OXIDATION- Overview  Process Types  Details of Thermal Oxidation  Models  Relevant Issues.

Slides:



Advertisements
Similar presentations
6.1 Transistor Operation 6.2 The Junction FET
Advertisements

FABRICATION PROCESSES
Chapter 6 Thermal oxidation and the Si/SiO2 interface
Chapter 4: Chemical Reactions
Anodic Aluminum Oxide.
Electricity from Chemical Reactions
CHAPTER 8: THERMAL PROCESS (continued). Diffusion Process The process of materials move from high concentration regions to low concentration regions,
Fick’s Laws Combining the continuity equation with the first law, we obtain Fick’s second law:
Homework: CMOS Fabrication Digital IC Design : Martin Page Discuss briefly the relationships between an ion beam’s acceleration potential, the beam.
Failures of Materials 1. Environmental Effects on the Materials There are significant impacts of environmental factors on Engineering Materials. 2.
For the exclusive use of adopters of the book Introduction to Microelectronic Fabrication, Second Edition by Richard C. Jaeger. ISBN © 2002.
Chapter 6 Thermal oxidation and the Si/SiO2 interface
Electrochemical Machining and Micromachining Summer school on electrochemical engineering, Palic, Republic of Serbia Prof. a.D. Dr. Hartmut Wendt, TUD.
ECE/ChE 4752: Microelectronics Processing Laboratory
Silicon Oxidation ECE/ChE 4752: Microelectronics Processing Laboratory Gary S. May January 15, 2004.
Deal-Grove Model Predictions Once B and B/A are determined, we can predict the thickness of the oxide versus time Once B and B/A are determined, we can.
Section 4: Thermal Oxidation
1 Microelectronics Processing Course - J. Salzman - Jan Microelectronics Processing Oxidation.
Chapter 6 Thermal oxidation and the Si/SiO2 interface
Mr. Ramos.   The gasoline in an automobile gas tank has a mass of 60.0 kg and a density of g/cm 3. What is its volume in cm 3 ?
EBB 323 Semiconductor Fabrication Technology
Microelectronics Processing
Lecture 7: IC Resistors and Capacitors
The Deposition Process
ECE/ChE 4752: Microelectronics Processing Laboratory
A. Transport of Reactions to Wafer Surface in APCVD
Rochester Institute of Technology - MicroE © REP/LFF 8/17/2015 Metal Gate PMOS Process EMCR201 PMOS page-1  10 Micrometer Design Rules  4 Design Layers.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #2. Chip Fabrication  Silicon Ingots  Wafers  Chip Fabrication Steps (FEOL, BEOL)  Processing Categories 
Models The first major model is that of Deal and Grove (1965) The first major model is that of Deal and Grove (1965) This lead to the linear/parabolic.
Integrated Circuit Devices Professor Ali Javey Summer 2009 Fabrication Technology.
1. A clean single crystal silicon (Si) wafer which is doped n-type (ColumnV elements of the periodic table). MOS devices are typically fabricated on a,
Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/2006 KEEE 4426 VLSI WEEK 3 CHAPTER 1 MOS Capacitors (PART 2) CHAPTER 1.
Diffusion of O 2 and H 2 O in SiO 2 What the semiconductor community learned from the oxidation of silicon Deal-Grove * analysis * Andy Grove, early work.
Gas-to Solid Processing surface Heat Treating Carburizing is a surface heat treating process in which the carbon content of the surface of.
I.C. Technology Processing Course Trinity College Dublin.
SEMINAR PRESENTATION ON IC FABRICATION PROCESS
Introduction to CMOS VLSI Design CMOS Fabrication and Layout Harris, 2004 Updated by Li Chen, 2010.
6/2/20161 CHAPTER 2 CORROSION PRINCIPLES Chapter Outlines 2.1 Oxidation and Reduction Reactions 2.2 Standard Electrode Half- Cell Potentials 2.3 Standard.
Polarization.
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #3. Diffusion  Introduction  Diffusion Process  Diffusion Mechanisms  Why Diffusion?  Diffusion Technology.
Introduction Amorphous arrangement of atoms means that there is a possibility that multiple Si atoms will be connected Amorphous arrangement of atoms means.
Dry Etching + Additive Techniques
ISAT 436 Micro-/Nanofabrication and Applications Thermal Oxidation David J. Lawrence Spring 2004.
Introduction EE1411 Manufacturing Process. EE1412 What is a Semiconductor? Low resistivity => “conductor” High resistivity => “insulator” Intermediate.
Lecture 18 OUTLINE The MOS Capacitor (cont’d) – Effect of oxide charges – V T adjustment – Poly-Si gate depletion effect Reading: Pierret ; Hu.
7 7-1 © 2003 Thomson Learning, Inc. All rights reserved Bettelheim, Brown, and March General, Organic, and Biochemistry, 7e.
Norhayati Soin 06 KEEE 4426 WEEK 3/2 20/01/2006 KEEE 4426 VLSI WEEK 4 CHAPTER 1 MOS Capacitors (PART 3) CHAPTER MOS Capacitance.
Updates of Iowa State University S. Dumpala, S. Broderick and K. Rajan Sep – 18, 2013.
Inorganic and Analytical Chemistry
Dean P. Neikirk © 1999, last update February 1, Dept. of ECE, Univ. of Texas at Austin Silicon Oxides: SiO 2 Uses: –diffusion masks –surface passivation.
CMOS VLSI Fabrication.
CMOS FABRICATION.
Ch. 21 Potentiometry 1. General principles
In the name of GOD.
Mass Transfer transport of one constituent from a region of higher concentration to that of a lower concentration.
How to turn an accident into a great experiment
PVD & CVD Process Mr. Sonaji V. Gayakwad Asst. professor
Etch Dry and Wet Etches.
Etch-Stop Techniques : (1) Doping Selective Etching (DSE)
Lecture 9.1 Building a FET.
Solid State Devices Fall 2011
Chemistry Review Matter: Takes up space and has volume
CHAPTER 5 Water and Seawater
Thermal oxidation Growth Rate
Chapter 7 Reaction Rates and Chemical Equilibrium
Laboratory: A Typical Oxidation Process
The Atomic-scale Structure of the SiO2-Si(100) Interface
Basic Planar Process 1. Silicon wafer (substrate) preparation
Presentation transcript:

OXIDATION- Overview  Process Types  Details of Thermal Oxidation  Models  Relevant Issues

Uses  As a part of a structure  e.g. Gate Oxide  For hard masks  e.g. In Nitride Etch, implant mask...  Protecting the silicon surface (Passivation )  Insulator (ILD/IMD)  As part of ‘mild etch’ (oxidation / removal cycles)  Whether useful or not, automatically forms in ambient  Native Oxide ( ~ 20 A thick)  except H-terminated Si (111)

Processes  Thermal Oxidation (Heating)  Dry vs Wet  Electrochemical Oxidation (Anodization)  Oxide (and nitride)  adhere well to the silicon  good insulator  Breakdown voltage 10 MV/cm  ==> Can make a very thin gate

Structure  Tetrahedral Structure  each Si to four O  each O to two Si  Single crystal quartz (density 2.6 g/cm 3 )  Fused silica (density 2.2 g/cm 3 )  Reaction with water ©Time Domain CVD  Si-OH termination is stable  structure is more porous than Si-O-Si

Thermal Oxidation Dry oxidation  Dense oxide formed (good quality, low diffusion)  slow growth rate  NEED TO KEEP WATER OUT OF THE SYSTEM Wet oxidation  Overall reaction  Relatively porous oxide formed (lower quality, species diffuse faster)  Still good quality compared to electrochem oxidation, for example  faster growth rate Wet oxide for masking Dry oxide for gate ox

Wet Oxidation  Proposed Mechanism  Hydration near Silicon/ Silicon oxide interface  Oxidation of silicon  Hydrogen rapidly diffuses out  Some hydrogen may form hydroxyl group

Diffusivities in Oxide  Oxygen diffuses faster (compared to water)  Sodium and Hydrogen diffuse very fast Water Oxygen Hydrogen Sodium 1/T Diffusivity (log scale)

Oxide Growth (Thermal) SiOxide Original Si surface  To obtain 1 unit of oxide, almost half unit of silicon is consumed (0.44)  Oxidation occurs at the Si/SiO 2 interface  i.e. Oxidizing species has to diffuse through ‘already existing’ silicon oxide

Oxide Growth (Thermal) SiliconOxideAir (BL)  At any point of time, amount of oxide is variable ‘x’  Usually, concentration of oxidizing species (H 2 O or O 2 ) is sufficiently high in gas phase  ==> Saturated in the oxide interface x Distance Concentration o i

Oxidation Kinetics  At steady state  diffusion through oxide = reaction rate at the Si/SiO 2 interface  Oxygen diffuses faster than Water  However, water solubility is very high (1000 times)  ==> Effectively water concentration at the interface is higher  ==> wet oxidation faster At steady state Diffusion Reaction

Oxidation Kinetics  Oxide Growth Rate Flux at steady state  = Flux/ # oxidizing species per unit volume (of SiO 2 )  n = 2.2 × cm -3 for O 2  = 4.4 × cm -3 for H 2 O Eqn Initial Condition  6.023x10 23 molecules  =1 mol of oxide = x g of oxide  = y cm3 of oxide (from density)  2.2 x molecules/cm 3  One O 2 per SiO 2  Two H 2 0 per SiO 2

Deal-Grove Model Solution where OR  is the time needed to grow the ‘initial’ oxide  A and B depend on diffusivity “D”, solubility and # oxidizing species per unit volume “n”  A and B will be different for Dry and Wet oxidation Bruce Deal & Andy Grove

Linear & Parabolic Regimes  Linear vs Parabolic Regimes  Kinetic Controlled vs Mass Transfer Controlled  Initially faster growth rate, then slower growth rate  Very short Time  Longer Time If one starts with thin oxide (or bare silicon)

Exponential Regime  Hypothesis 1  Charged species forms  holes diffuse faster / set up electrical field  diffusion + drift ==> effective diffusivity high  space charge regime controls  length = 15 nm for oxygen, 0.5 nm for water  ==> wet oxidation not affected  For dry oxidation, one finds that  is not zero in the model fit  A  corresponding to an initial thickness of 25 nm provides good fit  Initial growth at very high rate  Approximated by exponential curve If one starts with bare oxide

Exponential Regime  Hypothesis 2  In dry oxidation, many ‘open’ areas exist  oxygen diffuses fast in silicon  hence more initial growth rate  once covered by silicon di oxide, slow diffusion  Hypothesis 3  Even before reaction (at high temp), oxygen dissolved in silicon (reasonable diffusion)  once temp is increased, 5 nm quick oxide formation

Temp Variation of Linear/Parabolic Coeff Linear [B/A] Parabolic [B] Solubility and Diffusion function of temp © May & Sze

Effect of Doping  Doping increases oxidation rate  Segregation  ratio of dopant in silicon / dopant in oxide  e.g. Boron incorporated in oxide; more porous oxide  more diffusion  parabolic rate constant is higher  P not incorporated in oxide  no significant change in parabolic rate constant © May & Sze

Issues  Na diffuses fast in oxide  Use Cl during oxidation  helps trap Na  helps create volatile compounds of heavy metals (contaminant from furnace etc)  use 3% HCl or Tri chloro ethylene (TCE) Ref: VLSI Fabrication Principles by S.K. Ghandhi

Electrochemical  Use neutral solution and apply potential  Pt as counter electrode (Hydrogen evolution)  Use Ammonium hydrogen Phosphate or Phosphoric acid or ammonia solution  Silicon diffuses out and forms oxide  Increase in oxide thickness ==> increase in potential needed  self limiting  Oxide quality poor  Used to oxidize controlled amount and strip  for diagnosis