Combinational Logic and Verilog. XORs and XNORs XOR.

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Presentation transcript:

Combinational Logic and Verilog

XORs and XNORs

XOR

XOR gates

Cascading XOR gates

Parity Generation

74x280 9-bit odd/even parity generator

Verilog for 9-input parity checker

Structural Verilog for 74x280 parity checker

Parity generation and checking for a 8-bit-wide memory

Error-correcting circuit for a 7-bit Hamming Code Exors for parity see next slide

Error-correcting circuit for a 7-bit Hamming Code

Behavioral Verilog for Hamming error correction This is the same code as in last slide

Tree and Iterative circuits

Fig XORs in comparators

Big OR functions

Iterative combinational Circuits

Iterative Comparators

Iterative comparator of equality

74x85 4-bit comparator Output of A greater than B Output of A less than B output of A equal B 4-bit of A and 4-bit of B Input of A less than B Input of A equal B Input of A greater than B

12-bit comparator using 74x85 Iterative circuit

Verilog for 74x85 Five versions of Verilog comparator

Verilog comparator

Verilog Comparator

74x682 8-bit comparator EQ and Greater

74x682 8-bit comparator

Arithmetic Conditions (predicates) derived from 74x682 outputs