Demonstration Of SPIN By Mitra Purandare

Slides:



Advertisements
Similar presentations
Model Checking Base on Interoplation
Advertisements

1 Verification by Model Checking. 2 Part 1 : Motivation.
Copyright 2000 Cadence Design Systems. Permission is granted to reproduce without modification. Introduction An overview of formal methods for hardware.
Copyright 2000 Cadence Design Systems. Permission is granted to reproduce without modification. Conclusion Summary Research trends Resources.
Abstraction in Model Checking Nishant Sinha. Model Checking Given a: –Finite transition system M –A temporal property p The model checking problem: –Does.
Auto-Generation of Test Cases for Infinite States Reactive Systems Based on Symbolic Execution and Formula Rewriting Donghuo Chen School of Computer Science.
1 Software Model Checking Andrey Rybalchenko Slides partly by Rupak Majumdar.
M ODEL CHECKING -Vasvi Kakkad University of Sydney.
Algorithmic Software Verification VII. Computation tree logic and bisimulations.
CS 267: Automated Verification Lecture 8: Automata Theoretic Model Checking Instructor: Tevfik Bultan.
Partial Order Reduction: Main Idea
Introduction to Formal Methods for SW and HW Development 09: SAT Based Abstraction/Refinement in Model-Checking Roberto Sebastiani Based on work and slides.
SAT Based Abstraction/Refinement in Model-Checking Based on work by E. Clarke, A. Gupta, J. Kukula, O. Strichman (CAV’02)
1 Model checking. 2 And now... the system How do we model a reactive system with an automaton ? It is convenient to model systems with Transition systems.
Abstraction and Modular Reasoning for the Verification of Software Corina Pasareanu NASA Ames Research Center.
ECE Synthesis & Verification - L271 ECE 697B (667) Spring 2006 Synthesis and Verification of Digital Systems Model Checking basics.
Efficient Reachability Analysis for Verification of Asynchronous Systems Nishant Sinha.
Thomas Ball, Rupak Majumdar, Todd Millstein, Sriram K. Rajamani Presented by Yifan Li November 22nd In PLDI 01: Programming Language.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
Review of topics Final exam : -May 2nd to May 7 th - Projects due on May 7th.
CSEP590 – Model Checking and Software Verification University of Washington Department of Computer Science and Engineering Summer 2003.
Software Engineering: Where are we? And where do we go from here? V Software Engineering Lecture 23 Clark Barrett New York University 4/17/2006.
1 Carnegie Mellon UniversitySPINFlavio Lerda SPIN An explicit state model checker.
ECE Synthesis & Verification1 ECE 667 Spring 2011 Synthesis and Verification of Digital Systems Verification Introduction.
Automatically Validating Temporal Safety Properties of Interfaces Thomas Ball and Sriram K. Rajamani Software Productivity Tools, Microsoft Research Presented.
Bounded Model Checking EECS 290A Sequential Logic Synthesis and Verification.
Transaction Ordering Verification using Trace Inclusion Refinement Mike Jones 11 January 2000.
Predicate Abstraction for Software and Hardware Verification Himanshu Jain Model checking seminar April 22, 2005.
1 Model Checking Orna Grumberg Technion Haifa, Israel Taiwan, October 8, 2009.
Transaction Ordering Verification using Trace Inclusion Refinement Mike Jones 11 January 2000.
1 Completeness and Complexity of Bounded Model Checking.
Efficient Software Model Checking of Data Structure Properties Paul T. Darga Chandrasekhar Boyapati The University of Michigan.
1 Formal Engineering of Reliable Software LASER 2004 school Tutorial, Lecture1 Natasha Sharygina Carnegie Mellon University.
Efficient Modular Glass Box Software Model Checking Michael Roberson Chandrasekhar Boyapati The University of Michigan.
CS 267: Automated Verification Lecture 13: Bounded Model Checking Instructor: Tevfik Bultan.
The Model Checker SPIN Written by Gerard J. Holzmann Presented by Chris Jensen.
Formal verification Marco A. Peña Universitat Politècnica de Catalunya.
Formal Verification of SpecC Programs using Predicate Abstraction Himanshu Jain Daniel Kroening Edmund Clarke Carnegie Mellon University.
Algorithmic Software Verification I. Overview. Motivation Software validity is one of the main open problems in computer science. – Bugs have been there.
MCAI 2.0 Model Checking in Ten Minutes Edmund Clarke School of Computer Science Carnegie Mellon University.
Grand Challenge Problem: Model Check Concurrent Software Edmund M. Clarke Department of Computer Science Carnegie Mellon University.
Lecture 1: Model Checking
Cheng/Dillon-Software Engineering: Formal Methods Model Checking.
Model Checking Lecture 4 Tom Henzinger. Model-Checking Problem I |= S System modelSystem property.
1 New Development Techniques: New Challenges for Verification and Validation Mats Heimdahl Critical Systems Research Group Department of Computer Science.
Institute e-Austria in Timisoara 1 Author: prep. eng. Calin Jebelean Verification of Communication Protocols using SDL ( )
Software Engineering Research paper presentation Ali Ahmad Formal Approaches to Software Testing Hierarchal GUI Test Case Generation Using Automated Planning.
Copyright 2001, Matt Dwyer, John Hatcliff, and Radu Iosif. The syllabus and all lectures for this course are copyrighted materials and may not be used.
Verifying Autonomous Planning Systems Even the best laid plans need to be verified Prepared for the 2005 Software Assurance Symposium (SAS) DS1 MSL EO1.
CS5270 Lecture 41 Timed Automata I CS 5270 Lecture 4.
1 CSEP590 – Model Checking and Automated Verification Lecture outline for August 6, 2003.
1 Predicate Abstraction and Refinement for Verifying Hardware Designs Himanshu Jain Joint work with Daniel Kroening, Natasha Sharygina, Edmund M. Clarke.
- 1 -  P. Marwedel, Univ. Dortmund, Informatik 12, 05/06 Universität Dortmund Validation - Formal verification -
Verification & Validation By: Amir Masoud Gharehbaghi
HACNet Simulation-based Validation of Security Protocols Vinay Venkataraghavan Advisors: S.Nair, P.-M. Seidel HACNet Lab Computer Science and Engineering.
Properties Incompleteness Evaluation by Functional Verification IEEE TRANSACTIONS ON COMPUTERS, VOL. 56, NO. 4, APRIL
Static Techniques for V&V. Hierarchy of V&V techniques Static Analysis V&V Dynamic Techniques Model Checking Simulation Symbolic Execution Testing Informal.
ECE/CS 584: Verification of Embedded Computing Systems Model Checking Timed Automata Sayan Mitra Lecture 09.
Variants of LTL Query Checking Hana ChocklerArie Gurfinkel Ofer Strichman IBM Research SEI Technion Technion - Israel Institute of Technology.
Bounded Model Checking A. Biere, A. Cimatti, E. Clarke, Y. Zhu, Symbolic Model Checking without BDDs, TACAS’99 Presented by Daniel Choi Provable Software.
CIS 540 Principles of Embedded Computation Spring Instructor: Rajeev Alur
CS5270 Lecture 41 Timed Automata I CS 5270 Lecture 4.
SAT for Software Model Checking Introduction to SAT-problem for newbie
Presentation Title 2/4/2018 Software Verification using Predicate Abstraction and Iterative Refinement: Part Bug Catching: Automated Program Verification.
Formal Methods: Model Checkers and Theorem Provers
CIS 842: Specification and Verification of Reactive Systems
Aspect Validation: Connecting Aspects and Formal Methods
Over-Approximating Boolean Programs with Unbounded Thread Creation
Producing short counterexamples using “crucial events”
Predicate Abstraction
Presentation transcript:

Demonstration Of SPIN By Mitra Purandare Model Checking Demonstration Of SPIN By Mitra Purandare

Motivation More and more complex systems Increased dependability : everything important depends on computers Increased functionality : security, mobility Testing is becoming humanly un-manageable!

Testing Dynamic Execution/Simulation of System Generating test-cases : Limited by tester's ability to devise test-cases To Prove : Absence of a certain bug? To Prove : Presence of a certain property? Is CSARDAS 100% correct? Testing : Not formal/Mathematical!

Implications More efficient methods for test and verification needed. Formal Verification is the most promising approach. Experts in these new methods lacking!! Job : A great motivation to study formal methods!

Formal Verification Problem : Does an implementation satisfy a property? Two Basic categories Theorem provers : infinite state systems, time-consuming, not really automated Model Checkers : exhaustive state space exploration, finite state systems, automated

Model Checking Introduced by Clarke and Emerson, Quielle and Sifakis in 1981 Given a property (P) and a system (M), does M ⊨ P? Yes, P holds in M No, generate a trace which shows the property violation

Example : Model and Property Model : Kripke Structure, Finite State Machine, Automaton Property : CTL/ LTL Safety Property Liveness Property a b q c p LTL Result G !p a b c ! G !p a b a b a.... F q q U p

Model Checking Explicit State Model Checking : explicit state representation, Kripke structure( graph) Symbolic : Uses BDDs to represent sets of states Now a days SAT solvers!

Tools SPIN (Bell Labs) SMV, NuSMV (CMU) Mocha (Penn) JPF (Java Path Finder, NASA) Bandera (KSU) BLAST (Berkeley) MAGIC (CMU) FormalCheck (Cadence) RuleBase (IBM, Haifa) SLAM, Zing (Microsoft Research) FormalPro (Mentor Graphics)

SPIN(Simple Promela INterpreter) Developed by G.Z. Holzman@Bell Labs Promela (PROtocal MEta LAnguage) Publicly available since 1991 Prestigious ACM System Software Award for 2001 Most efficient and scalable still active research -> good support

SPIN Explicit state LTL model checker On-the-fly reachability Partial order reduction to reduce state space Targets software verification Scales well for large problem sizes

The Cabbage-Goat-Wolf problem! Ferryman with C, G, W and a boat on one side of a river Only ferryman can row the boat Ferryman can take only one item at a time Not goat and wolf together without ferryman Not goat and cabbage together without ferryman GOAL : Ferryman wants to take all 3 items to the other side!

Property Goal : wolf_location = destination & goat_location = destination & cabbage_location = destination & ferryman_location = destination Restriction 1 : wolf_location = goat_location & ferryman_location != wolf_location Restriction 2 : goat_location = cabbage_location & ferryman_location != cabbage_location !(Restriction 1 | Restriction 2) U Goal

State Transition Diagram 4 variables, ferryman, cabbage, goat, wolf respectively 1 : on this bank , 0 : other bank i.e. destination 0111 0010 0011 1011 1010 1000 0101 1111 1101 0001 1001 0000 0110 1110 0100 1100

SPIN References http://spinroot.com/spin/whatispin.html THE SPIN MODEL CHECKER Primer and Reference Manual : Holzman Model Checking : Clarke, Grumberg and Peled Symbolic Model Checking : Kenneth L. McMillan OR Come To the H-Floor! :)

Challenges Coverage Reliability Repair Scalability Infinite State System Specification InterOperability

Future Bounded Model Checking SAT Solvers Abstraction and refinement Hybrid Systems