Solid State Electronics IC Fabrication Technology - PT2 Ronan Farrell Recommended Book: Streetman, Chapter 9 Solid State Electronic Devices
Making a MOSFET Silicon surface N-Well
Making a MOSFET SiO2 grown on either side of our area of interest. It acts as a buffer between this device and a nearby device. Field Oxide N-Well
Making a MOSFET SiO2 and then polysilicon P++ deposited over all of the wafer Polysilicon Oxide Field Ox N-Well
Making a MOSFET Using a mask to ensure that we don’t etch the centre piece, apply an acid to remove all the unexposed photoresist and the additional layer of SiO2 (note not all of it, leave the boundary layers behind. We’ve now got our gate. Field Ox N-Well
Making a MOSFET Using a mask again to control location, apply doping so that a lightly doped region exists on either side of the gate. This means close to gate we won’t get the dopant diffusing under it. P-minus Field Ox N-Well
Making a MOSFET Grow a small area of additional oxide around the gate, you’ll see why on the next slide. Oxide Spacer P-minus Field Ox N-Well
Making a MOSFET A heavily doped P+ region is now formed on either side of the gate. The spacer guaranteed that the N-type channel under the gate was protected. So note, a heavily P+ region connected to a lightly doped P- region, an N type channel and then the same again on the other side. Oxide Spacer P- P+ Field Ox N-Well
Making a MOSFET Over all of this place a layer of oxide to close off the entire MOSFET. Silicon Oxide Field Oxide N-Well
Making a MOSFET Using a mask cut three holes through the new oxide layer to the polysilicon and the two heavily doped P+ regions. Silicon Oxide Field Oxide N-Well
Making a MOSFET Fill these with metal and top it all off with an additional layer of oxide. Normally tungsten is used for these connections as it bounds well to the silicon. Drain Gate Source Silicon Oxide Field Oxide N-Well
Making a Resistor Resistors are easy, use a resistive piece of semiconductor, ie some lightly doped region and vary size accordingly. Resistors require a lot of space as they need to be long and narrow to get the resistance up, ie the number of squares. Top Down View
Making a Capacitor Side View One side (+) Other side (-) Capacitors are also easy, a common technique is to use the metal wiring layers of the semiconductor process. On two levels make a large square sheet of metal. The oxide between the layers acts very well as a dielectric. There are refinements to this and fringing capacitance is a problem but basically capacitance is proportional to area. Using more than two levels and alternating the polarity increases the capacitance. Side View One side (+) Other side (-)
Making an Inductor One end Other end Inductors are very hard to make in an integrated chip. Inductors need coils but we can’t get this 3D structure in what’s basically a 2.1D technology. The best solution so far is to make a coil. This does provide an inductance but it is weak and lossy. The other source of inductance is actually the bond wires and that is an inductance you don’t want as it leads to oscillations. Basically avoid having to use an inductor in your circuit if you can avoid it. One end Other end