Operand And Instructions Representation By Dave Maung

Different types of Operand/Instruction Zero Operands per instruction Zero Operands per instruction One Operands per instruction One Operands per instruction Two Operands per instruction Two Operands per instruction Three operands per instruction Three operands per instruction

Zero Operand Per Instruction Also known as Stack Architecture because Operand are kept in stack. Also known as Stack Architecture because Operand are kept in stack. To add an instruction using zero operand, take two values and add them together and put the result back to then stack. To add an instruction using zero operand, take two values and add them together and put the result back to then stack. Operand must be implicit Operand must be implicit

An example of Instruction used on a stack computer Push X Push 7 Add Pop X

One Operand Per Instruction Architecture that limit each instruction to single operand is known as 1-address design. Architecture that limit each instruction to single operand is known as 1-address design. Relies on implicit operand for each instruction to store in special register known as an accumulator. Relies on implicit operand for each instruction to store in special register known as an accumulator.

Step to process one operand per Instruction 1. Processor extracts the current value of the accumulator 2. Performs the specified operation using the extracted value and the operand 3. place the result back in the accumulator

Example of One operand per instruction Add X Accumulator  accumulator + X

Disadvantage of One Operand Per Instruction It does not allow instructions to specify two values. It does not allow instructions to specify two values. It requires two instructions that load the value into the accumulator and then need to store the values back in the new location It requires two instructions that load the value into the accumulator and then need to store the values back in the new location

Two Operands Per Instruction Overcomes the limitation 1- address systems Overcomes the limitation 1- address systems Using 2 address process, an operation can be applied to a specified value. Using 2 address process, an operation can be applied to a specified value. It also offers data movement instructions that treat the operand as source and destination. It also offers data movement instructions that treat the operand as source and destination.

Example two operand per instruction Add X Y Specifies that the value of X is to be added to the current value of Y Y  Y + X

Three Operand Per Instruction Similar as Two Operand Per Instruction except that it can operate three input value per instruction Similar as Two Operand Per Instruction except that it can operate three input value per instruction

Example of three operand per instruction Add X Y Z Specifies an assignment of Z  X + Y

Operand that specifies a source must be A signed constant A signed constant An Unsigned constant An Unsigned constant The content of a register The content of a register The value in a memory location The value in a memory location

Operand the specifies a destination must be: A signed register A signed register A pair of contiguous registers A pair of contiguous registers A memory location A memory location

Von Nuemann Boottleneck Operand addressing is the central weakness of a von Neumann architecture. Operand addressing is the central weakness of a von Neumann architecture. memory access may become a bottleneck because instructions are stored in memory and a processor must make at least one memory per instruction. memory access may become a bottleneck because instructions are stored in memory and a processor must make at least one memory per instruction. To Optimize the performance, operand must be taken from a register instead of memory. To Optimize the performance, operand must be taken from a register instead of memory.

Types of Encoding 1. Explicit Operand Encoding 2. Implicit Operand Encoding

Implicit Operand Encoding The Opcode specifies the types of operands. The Opcode specifies the types of operands. A processor that uses a implicit encoding contains multiple operand code for a given operation A processor that uses a implicit encoding contains multiple operand code for a given operation

Example of Implicit Encoding

Disadvantage of Implicit encoding Multiple opcodes are needed for a given operation. Multiple opcodes are needed for a given operation. A list of opcodes can become large, when a processor allows many types of operands. A list of opcodes can become large, when a processor allows many types of operands.

Explicit Encoding Using Explicit can overcome the disadvantage of implicit encoding. Using Explicit can overcome the disadvantage of implicit encoding. Each operand is represented by two fields: Each operand is represented by two fields: Type of Operand Type of Operand Type of Value Type of Value

Example of Explicit Operand Encoding

Tradeoffs in the choice of operands Ease of Programming Ease of Programming Fewer Instructions Fewer Instructions Smaller Instructions Smaller Instructions Larger Range of Immediate Values Larger Range of Immediate Values Faster Operand Fetch and Decode Faster Operand Fetch and Decode Decreased Hardware size Decreased Hardware size

Ease of Programming We know that complex forms of operands make programming easier We know that complex forms of operands make programming easier 3-address approach mean we do not need to code separate instructions. 3-address approach mean we do not need to code separate instructions.

Fewer Instructions Reduces the number of instruction in a program by increasing the expressive power of operands Reduces the number of instruction in a program by increasing the expressive power of operands Lowers the count of instructions by increasing the number of addresses Lowers the count of instructions by increasing the number of addressesDisadvantage: Each instruction will be larger

Disadvantage of keeping smaller instruction Decreases the expressive power. Decreases the expressive power. Increases the number of instructions Increases the number of instructions

Smaller Instructions How to keep smaller Instruction? How to keep smaller Instruction? 1. Limiting the number of operands 2. Limiting the set of operands types 3. Limiting maximum size of an operand keep instruction small

Larger Range of Immediate values Increasing the size allows larger values because the size of a field in the operand determines the numeric range of immediate values. Increasing the size allows larger values because the size of a field in the operand determines the numeric range of immediate values.Disadvantage: Larger instruction results

Faster Operand Fetch and Decode How to operate hardware faster? How to operate hardware faster? First, limit the number of operands First, limit the number of operands Second, limit the possible types of each operand Second, limit the possible types of each operand

Decreased Hardware size How to decrease the hardware size? How to decrease the hardware size? limits the types and complexity of operands limits the types and complexity of operands Reduces the size of circuitry Reduces the size of circuitry

Values in Memory Every processors include at least one instruction that allows an operand to specify value in memory Every processors include at least one instruction that allows an operand to specify value in memory Values in the operand interpreted as an memory address. Values in the operand interpreted as an memory address. This memory address is for the professor to perform memory lookup. This memory address is for the professor to perform memory lookup.

Advantage of memory look up Helps ease programming Helps ease programming Helps allowing arbitrary instruction to reference memory. Helps allowing arbitrary instruction to reference memory. improves performance. improves performance.

Operand Addressing Modes Instruction register is used to hold an instruction that is being decoded. Instruction register is used to hold an instruction that is being decoded. A immediate value can be found in instruction register A immediate value can be found in instruction register

Summary Covered different type of Operand instruction, Von Neumann Bottleneck, different choice of operand Covered different type of Operand instruction, Von Neumann Bottleneck, different choice of operand