NAME OF FACULTY : MR. Harekrushna Avaiya DEPARTMENT: E.C. (PPI-1ST) BASIC ELECTRONICS

Field-effect transistor The field-effect transistor (FET) is a transistor that uses an electric field to control the shape and hence the conductivity of a channel of one type of charge carried in a semiconductor material. FETs are unipolar transistors as they involve single-carrier-type operation.

 The Field Effect Transistor is a device which enables us to use one electrical signal to control another.  The name ‘transistor’ is a shortened version of the original term, transfer resistor, which indicates how the device works. Most transistors have three connections.  The effect is to make a ‘resistance’ whose value can be altered by the input signal.

 We can use this behavior to ‘transfer’ patterns of signal fluctuation from a small input signal to a larger output signal.

 A wide variety of devices are called transistors. Here will just look at one example, called an N-channel Junction- FET (J-FET).  Figure 7.1 illustrates what this looks like. This sort of transistor is made by forming a channel of N-type material in a substrate of P-type material.  Three wires are then connected to the device. One at each end of the channel.

A pair of metallic contacts are placed at each end of the channel. When we apply a voltage between these, a current can flow along the channel from one contact to the other.

The contact which launches charges along the channel is called the source, the one that 'eats' them at the other end is called the drain.

 In an n-channel device, the channel is made of n-type semiconductor, so the charges free to move along the channel are negatively (hence n) charged - they are electrons.  In a p-channel device the free charges which move from end-to-end are positively (hence p) charged - they are holes.  Remember that a hole is the absence of an electron. In each case the source puts fresh charges into the channel while the drain removes them at the other end.

Schematic symbols Circuit symbol for an n-Channel JFET Circuit symbol for a p-Channel JFET

N-channel JFET: (a) Depletion at gate diode. (b) Reverse biased gate diode increases depletion region. (c) Increasing reverse bias enlarges depletion region. (d) Increasing reverse bias pinches-off the S-D channel. The thickness of the depletion region can be increased Figure above (b) by applying moderate reverse bias. This increases the resistance of the source to drain channel by narrowing the channel.

Increasing the reverse bias at (c) increases the depletion region, decreases the channel width, and increases the channel resistance. Increasing the reverse bias VGS at (d) will pinch-off the channel current. N-channel JFET electron current flow from source to drain in (a) cross-section, (b) schematic symbol.