Pipeline MIPS תרגול כיתה מס' 12

דוגמה 1 הסבירו איזה מעקף (bypass/forwarding) דרוש ב- pipeline בכדי לבצע את התכנית הבאה: add$2,$3,$4 add$4,$5,$6 add$5,$3,$4

פתרון 1 clk 1 clk 2 clk3 clk4 clk5 clk6 clk7

PC Instruction memory Registers M u x M u x Control ALU EX M WB M WB WB ID/EX EX/MEM MEM/WB Data memory M u x Forwarding unit IF/ID I n s t r u c t i o n M u x RD=5 EX/MEM.RegisterR MEM/WB.RegisterRd RT=4 R R S=3 IF/ID.RegisterRd IF/ID.RegisterRt IF/ID.RegisterRt IF/ID.RegisterRs d RegWrite Add $5,$3,$4Add $4,$5,$6Add $2,$3,$4 2 Result add(2) Clk 4 Warning: Reading old $4 Rs=3 Rt=4 [$3] Old [$4] [$5] [$6] No forwarding needed.

Clk 5 PC Instruction memory Registers M u x M u x Control ALU EX M WB M WB WB ID/EX EX/MEM MEM/WB Data memory M u x Forwarding unit IF/ID I n s t r u c t i o n M u x RD=5 EX/MEM.RegisterR MEM/WB.RegisterRd RT=4 R R S=3 IF/ID.RegisterRd IF/ID.RegisterRt IF/ID.RegisterRt IF/ID.RegisterRs d RegWrite Add $5,$3,$4Add $4,$5,$6Add $2,$3,$4 4 Result add(2) Rs=3 Rt=4 [$3] Old [$4] Rs=3 ≠ Mem: Dst=4 Rs=3 ≠ Wb: Dst=2 New [$4] 0 2 Rt=4 = Mem: Dst=4 Rt=4 ≠ Wb: Dst=2 imm

דוגמה 2 הסבירו איזה מעקף (bypass/forwarding) דרוש ב- pipeline כדי לבצע את התכנית הבאה: add$2,$5,$4 add$4,$2,$5 Sw$5,100($2) add$3,$2,$4

Hazard detection unit main: lw $t0, 0($s0) add $s1, $t0, $t1 sub $s2, $t0, $t1 Forward unit can not resolve the load hazard conflict. Bubble insertion is needed.

Old[$t0] old old[$t0] PC Instruction memory Registers M u x M u x Control ALU EX M WB M WB WB ID/EX EX/MEM MEM/WB Data memory M u x Forwarding unit IF/ID I n s t r u c t i o n M u x RD=5 EX/MEM.RegisterR MEM/WB.RegisterRd RT=4 R R S=3 IF/ID.RegisterRd IF/ID.RegisterRt IF/ID.RegisterRt IF/ID.RegisterRs d RegWrite sub $s2, $t0, $t1 add $s1, $t0, $t1 lw $t0, 0($s0) 2 Result add(2) [$t1] Beginning of Clk 4 – Without hazard detection unit [$t1] Memory address

PC Instruction memory Registers M u x M u x Control A LU EX M WB M WB WB ID/EX EX/MEM MEM/WB Data memory M u x Forwarding unit IF/ID I n s t r u c t i o n M u x RD=5 EX/MEM.RegisterR MEM/WB.RegisterRd RT=4 R R S=3 IF/ID.RegisterRd IF/ID.RegisterRt IF/ID.RegisterRt IF/ID.RegisterRs d RegWrite sub $s2, $t0, $t1 add $s1, $t0, $t1 lw $t0, 0($s0) 2 Result add(2) rs Clk 3 – hazard detection unit rt exe.rdest (=exe.rt) exe.MemRead Hazard detection unit 0 opcode

1 PcLoad Hazard detection unit Exe.memRead Exe.RegDest Dec.rs Dec.rt Dec.opcode ID/IF Load ControlBits = = Compare opcode (ignore rt in I-type ) Check if the previous Inst. was a load - otherwise don’t do anything Check if any of the source Operands is the load destination =1 =$t0 =$t =$t0 1 1 =

PC Instruction memory Registers M u x M u x Control A LU EX M WB M WB WB ID/EX EX/MEM MEM/WB Data memory M u x Forwarding unit IF/ID I n s t r u c t i o n M u x RD=5 EX/MEM.RegisterR MEM/WB.RegisterRd RT=4 R R S=3 IF/ID.RegisterRd IF/ID.RegisterRt IF/ID.RegisterRt IF/ID.RegisterRs d RegWrite Address of : sub $s2, $t0, $t1 add $s1, $t0, $t1 lw $t0, 0($s0) 2 Result add(2) rs Clk 3 Clk 3 rt exe.rdest (=exe.rt) exe.MemRead Hazard detection unit 0 opcode Don’t Increment PC – keep read the sub Inst. From Memory Send nop to exe stage – by zeroing the Control bits that moves to the next pipe stage. Don’t Load the sub to the ID/IF reg. Keep the add there for the next clk. Cycle.

PC Instruction memory Registers M u x M u x Control A LU EX M WB M WB WB ID/EX EX/MEM MEM/WB Data memory M u x Forwarding unit IF/ID I n s t r u c t i o n M u x RD=5 EX/MEM.RegisterR MEM/WB.RegisterRd RT=4 R R S=3 IF/ID.RegisterRd IF/ID.RegisterRt IF/ID.RegisterRt IF/ID.RegisterRs d RegWrite Address of : sub $s2, $t0, $t1 add $s1, $t0, $t1 lw $t0, 0($s0) 2 Result add(2) rs Clk 4 Clk 4 rt exe.rdest (=exe.rt) exe.MemRead Hazard detection unit 0 opcode nop

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