Normal text - click to edit Trigger interface module Kjetil Ullaland, Sten Solli, Johan Alme TPC Electronics meeting. CERN 13-14. Jan 2005.

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Presentation transcript:

Normal text - click to edit Trigger interface module Kjetil Ullaland, Sten Solli, Johan Alme TPC Electronics meeting. CERN Jan 2005

Normal text - click to edit Overview Version 1.0 Serial B channel Proposed new design (version 2.0) Status

Normal text - click to edit Previous design The complete design was hosted on the DCS FPGA.

Normal text - click to edit Version 1.0 – Top level design

Normal text - click to edit Version 1.0 – Block design

Normal text - click to edit Trigger data is sorted and presented in such a way that it fits DAQ common data format. No extra load for the Data Assembler. Address TriggerInfo18bL1 Trigger Msg 2bBCID TriggerInfo28bOrbitID TriggerInfo38bL2Detector TriggerInfo44b16bTTCrx BunchCnt TriggerInfo5L2Class TriggerInfo6RoI 10bL2Class TriggerInfo7RoI From TTCrx internal counters From L2accept trigger message From L1 trigger message From Region of Interest message Unused bits buffered with zeros Trigger info registers

Normal text - click to edit Serial B channel Datastream on the serial B channel is enabled by setting bit 6 in the control register in TTCrx. New data on Serial B channel arrives straight after the TTCrx issues a L1accept.

Normal text - click to edit Serial B channel The data arrives in the following order (depending on type of trigger): –L1 header CIT, RoC, ESR, L1SwC, L1Class –L1 data L1Class –L2a header BCID –L2a data OrbitID, CiT, L2Sw, L2Cluster, L2Class –L2r address BCID –RoI header BCID –RoI data RoIdata These data are stored in triggerinfo registers in the TTCrx receiver module.

Normal text - click to edit Version 2.0 Split the trigger interface module in to two modules –TTCrx controller module – on the DCS board. –TTCrx receiver module – on the RCU board. This removes the DCS FPGA from the datapath. –Datapath not reliable of parts that can fail because of SEFIs. Uses the Serial B channel for data transportation, instead of the data lines from the TTCrx. –The data is transmitted using a 40 MHz clock Event counter numbers are generated by the TTCrx receiver module. TTCrx receiver module contains the triggerinfo registers.

Normal text - click to edit Version Top level

Normal text - click to edit Version 2.0 – Block design

Normal text - click to edit TTCrx receiver module – main tasks Handle L1 trigger –Pass through and count Receive and decode messages over serial B channel and generate L2a trigger. Handle bad triggers Book keeping (counters ++)

Normal text - click to edit TTCrx controller module – main tasks Initialization Control the TTCrx over the I2C bus. Status of the TTCrx.

Normal text - click to edit Status Recently started working on this module. The new design is based on Sten Sollis design. Specifications soon finished.