Atacama Large Millimeter/submillimeter Array Expanded Very Large Array Robert C. Byrd Green Bank Telescope Very Long Baseline Array DBE Implementation for VLBA Keith Morris & Matt Luce CASPER2010 August 18 th, 2010
DBE Contributors Haystack: – Alan Hinton, Arthur Niell, Shep Doeleman, Mikael Taveniku, Christopher Beaudoin, Chester Ruszczyk, Russ McWhirter NRAO: – Doug Gerrard, Bob McGoldrick, Hichem Ben Frej, George Peck, Steve Durand, Jon Romney, Craig Walker, Mike Revnell, Walter Brisken, Keith Morris, Jim Jackson, Miguel Guerra, Matt Luce CASPER KAT
The Very Long Baseline Array 3
VLB A Current IF Processing 4 Four IFs – Eight sidebands – 2 sidebands (upper/lower) per IF – 16MHz per sideband – 128 Mbps peak data rate
VLBA Upgraded IF Processing 5 Single sideband Up to Four IFs – 512MHz per IF – 4x128MHz sub-bands per IF – 16 total down-converters per DBE – 4096Mbps peak data rate
DBE Hardware: Overview 6
DBE Framework/Infrastructure 7
Synthesizer/Clock Distribution Board Inputs – 5MHz reference (Maser) – GPS 1 PPS Outputs: – 1024MHz (3 copies) 1.5 o RMS phase noise – 1 PPS (4 copies) Buffers ALC control signals from ROACH
Automated Level Control (ALC) Gain: -11dB to +20dB in 1dB steps Optional 20dB fixed attenuator 2 channels
ALC-Bandpass variation
ALC Delay variation
Anti-aliasing filter amplitude
Anti-aliasing filter: band edges
Anti-aliasing filter: stopband
Anti-aliasing filter: phase
DBE Framework/Infrastructure 16 Blue boxes are Haystack specific and will be replaced in the DDC personality
DDC: Block Diagram 17
ALC: Raw sample capture Accepts de-multiplexed samples from both ADC channels Selectable IF0/IF1 capture Output sample stream: – Up to time continuous samples of the raw ADC data Two access methods: – File – Network socket 18
ALC: Raw sample capture examples 19
ALC: Power setting loop 20 Relative Power – V rms to dBm – Adjust ALC linearly in dB
GUI: Device Browser, Matrix Switch
GUI: Device Browser, DBE
GUI: Monitor archive query tool 23
GUI: Monitor archive data
Results 1: Autocorrelation on LA 25
Results II: 0 Baseline Cross-correlation 26
Questions? 27
ALC Adjustment Range Nominal Input power to the DBE: -33dBm. 28 ALC Control Value Sampler Input power level RMS CountsSampler Head Room dBm3220dB dBm2322.5dB dBm1626dB dBm9.530dB dBm3.340dB
DDC: Specifications As per the VLBA sensitivity upgrade project book, the filters in the DDC personality must conform to the following: – Quantity:Eight DDCs per 512MHz wide channel – Tunable range:Within the 512MHz wide channel – Minimum tuning step:1 Hz (center frequency specified). – Output truncation: Any number of bits between 1 and 8. – Decimated output rate: 128 kbits/s – 2048 Mbits/s. – Return to previous phase after switching to another frequency/bandwidth and back. 29