© imec 2006 A Scalable Programmable Baseband Platform for Energy-Efficient Reactive Software-Defined-Radio B. Bougard (presenter), D. Novo, F. Naessens, L. Hollevoet, T. Schuster, M Glassee, A. Dejonghe, L. Van der Perre CrownCom 2006 Mykonos, Greece June 9, 2006

© imec 2006 CONFIDENTIAL A user’s dream: Anything, anywhere, anytime Fixed wireless access Public hot-spot Office WLAN Higher Rate Cellular Mobile DVB-H DAB Tomorrow’s new standard ?

© imec 2006 CONFIDENTIAL Today’s solution: multiple radios

© imec 2006 CONFIDENTIAL All cost factors direct us towards SDRs $ Silicon Area $ #components $ Volume $ Time-to-Market $ Various NRE Software Defined Radio

© imec 2006 CONFIDENTIAL SDR: a wireless dream come true? SDR

© imec 2006 CONFIDENTIAL Outline Reactive SDR platform requirements State-of-the-art Design methodology for flexibility and low energy Reactive radio platform architecture Scalable platform interconnect Reactive digital front-end Coarse-Grain Array based baseband processor Radio Control processor Preliminary design results

© imec 2006 CONFIDENTIAL Outline Reactive SDR platform requirements State-of-the-art Design methodology for flexibility and low energy Reactive radio platform architecture Scalable platform interconnect Reactive digital front-end Coarse-Grain Array based baseband processor Radio Control processor Preliminary design results

© imec 2006 CONFIDENTIAL Reactive Software defined radio: definition Base-station SDR (90% SoA) Terminal SDR -> hot topic - Single-mode Terminal SDR - Multi-mode Terminal SDR - Mode-configurable - Reactive radio - Cognitive radio Tier 1 – Software Controlled Radio Tier 2 – Software Defined Radio Tier 3 – Ideal Software Radio Tier 4 – Ultimate Software Radio Tier 0 Hardware Radio

© imec 2006 CONFIDENTIAL Required Reactive radio platform features Low Cost Energy AwareSpectrum Aware Long HW lifespan Short SW deployment time Scalable HW/SW Energy scalable HW Energy scalable algorithms Energy scalable SW mapping Techno-aware energy managnt Versatile RX FE architecture Versatile TX FE architecture Powerful MAC/RLC/QoS Ctrl

© imec 2006 CONFIDENTIAL Outline Reactive SDR platform requirements State-of-the-art Design methodology for flexibility and low energy Reactive radio platform architecture Scalable platform interconnect Reactive digital front-end Coarse-Grain Array based baseband processor Radio Control processor Preliminary design results

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency [Mips/mW]

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency TI

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency Sandbridge

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency ICERA

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency SH 5 50

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency EVP

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency SODA

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency

© imec 2006 CONFIDENTIAL SDR State-of-the-art: no global approach Baseband processor MPSOC Mixed signal platform Single thread Static multi-thread Dynamic multi-thread Scope Concurrency Management Mapping productivity Single-mode reconfigurable Reactive multi-mode Cognitive radio Performance 1-10Mbps Mbps Mbps ASM Processor C Platform C Energy efficiency Objective

© imec 2006 CONFIDENTIAL Unique approach: Making flexibility rhyme with low-energy Energy scalable - front-end - baseband platform - air interface algorithm - protocols Joint quality-of-experience and energy management to translate energy scalability in low power operation

© imec 2006 CONFIDENTIAL Outline Reactive SDR platform requirements State-of-the-art Design methodology for flexibility and low energy Reactive radio platform architecture Reactive digital front-end Coarse-Grain Array based baseband processor Radio Control processor Preliminary design results

© imec 2006 CONFIDENTIAL Opportunistic partitioning Typical Wireless LAN:Typical Cellular scenario: Transmit5%Transmit.5% Receive5%Receive.5% Idle/Listen90%Idle/Listen99% Approach: Flexibility where needed  Ultra Low Power generic / low flexible listen/scan circuitry (Digital Front End)  Processor-based Digital Transceiver with aggressive power management  Processor power-overhead amortized by low utilization!

© imec 2006 CONFIDENTIAL Systematic methodology to design energy- aware SDR platform and software Application analysis and modeling Platform independent optimization Opportunistic partitioning Platform architecture definition Inter-thread communication and RT management Interconnect refinement Threads implementation Cores Uarchitecture refinement Virtual platform modeling SW mappingHW design

© imec 2006 CONFIDENTIAL Resulting platform template DFE tile SyncPro DFE tile SyncPro DFE tile SyncPro BW optimized scalable interconnect Platform & MAC ctrl BB engine FEC engine L2 Periph and HI ‘white box’ design environment: true ESL flow scalable retargetable virtual platform Smooth HW/SW co-design, verification and test flow SDR-tuned CGA: C compiler high performance- power ratio ILP vs. DLP tradeoff Digital front end: Solution for reactive radio Ultra low power in standby Scalability & Heterogeinity enabling low power through cross layer manager

© imec 2006 CONFIDENTIAL Outline Reactive SDR platform requirements State-of-the-art Design methodology for flexibility and low energy Reactive radio platform architecture Scalable platform interconnect Reactive digital front-end Coarse-Grain Array based baseband processor Radio Control processor Preliminary design results

© imec 2006 CONFIDENTIAL Scalable platform interconnect BB1 BB2 L2 mem

© imec 2006 CONFIDENTIAL ESL flow provides efficient debug/profiling/recycle environment Coware CSC TM

© imec 2006 CONFIDENTIAL Digital Front-end: Scalable autonomous detection/synchronization units Multiple detection tiles allowing flexible support for MIMO reception and/or multi- mode scanning. Tiles’ datapath is straight- through (no processor or controller is part of the data path). Digital signal detection is performed in an application specific processor in each tile. Hierarchical activation and configuration is performed by a global resource activity controller (RAC). 5mW active power per (re)active tile (CMOS90)

© imec 2006 CONFIDENTIAL Hierarchical activation Key idea: gradually enable the more power-consuming parts of the platform as the chance of a valid signal reception increases.

© imec 2006 CONFIDENTIAL Synchronization Processor Micro- architecture optimized for ultra-low-power CMOS 90 nm design 80MHz < V including instruction fetch and load/store

© imec 2006 CONFIDENTIAL Select the right baseband processor  a tightly integrated combination of a VLIW DSP and a Coarse Grain Array  a dedicated ISA exploited DLP (intrinsic- controlled SIMD)  a compiler to map applications described in C directly on these architectures Baseband processing is dataflow dominated Baseband processing is computing intensive (4 op/memory access) Wireless requires low power CGA provides dense interconnection network matching DF CGA achieves very high IPC CGA provides low power through low instruction fetch freq. Low TTM requires programming ease

© imec 2006 CONFIDENTIAL Baseband architecture: ADRES 400MHz core MHz L1 25GOPS effective 64MOPS/mW 3 mm2 (with L1) Fetch Instruction Dispatch Instruction Decode Central Registerfile FU RC … … … … Support IEEE n

© imec 2006 CONFIDENTIAL Outline Reactive SDR platform requirements State-of-the-art Design methodology for flexibility and low energy Reactive radio platform architecture Reactive digital front-end Coarse-Grain Array based baseband processor Radio Control processor Preliminary design results

© imec 2006 CONFIDENTIAL Preliminary design results

© imec 2006 CONFIDENTIAL Conclusions CR spectrum data mining and agile air interface requirements claim for SDR implementations To be viable, a SDR platform must be both low cost and low power First step toward CR SDR platform: reactive radio platform Heterogeneous MPSoC is best fit approach for SDR due to variety of task requirements. Energy-scalable design coupled with adaptive joint QoS and energy management are the keys to bring flexibility and energy-efficiency together We proposed a methodology to design energy-scalable SDR MPSoC architecture with balanced tradeoff between cost, energy efficiency and flexibility We are designing such SoC targeting n, e and 3GPP-LTE standards (>100Mbps) First results: 90 nm CMOS 2 Mgates 2-10mW standby power (when reactive to at least one air interface) <300mW average power when operating a standard

© imec 2006 CONFIDENTIAL Thank you!