HOLMS John F. Snowdon February 20th 2004

Research

Conjunct Dynamic Serial Optical Interconnect (DSOI) A next generation protocol-agile serial optical interconnect component. New market between telecoms and traditional parallel all electrical transmission. Stepping stone from solely electrical short range interconnects to high bandwidth optical solutions. Uses proven components creating a low cost, tolerance insensitive part. Optoelectronics are used in a manner that is both cost-effective and technologically elegant.

Demonstrator Projects Advanced Modelling of Optical Systems (AMOS) Partners: Leeds University and Silicon Graphics. Neural Optoelectronic Switch Controller (NOSC) Partners: Transtech, BT and NeuScience. High-Speed Optoelectronic Memory (HOLMS) Partners: ETH Zurich, Siemens and Hagen Univeristy et. al. Programmable Optoelectronic Computer Architectures (POCA) Partners: Edinburgh University, Xilinx and BAe Systems. System for Transparent Avionics (STAR) Partners: Imperial College London, BAe Systems and DERA.

Partners BAe Systems, UK British Telecom, UK Ecole Superieure d'Electricite (SUPELEC), France ILFA GmbH, Germany Imperial College London, UK Leeds University, UK Siemens Business Services GmbH & Co. OHG, Germany Silicon Graphics Inc., UK Swiss Federal Institute of Technology (ETHZ), Switzerland Terahertz Photonics, UK THALES Communications (TCFR), France Universität Gesamthochschule Paderborn, Germany University of Hagen, Germany Xilinx, USA

HOLMS High-Speed Optoelectronic Memory Systems To develop optoelectronic packaging technology that allows a seamless integration of complex, parallel optoelectronic interconnection with conventional high performance electronic systems. To construct a demonstrator to prove that the above technology can dramatically increase the performance of real life information systems. The key problem of today’s computer architectures will be addressed: memory latency.

Technical Approach The project aims to integrate: Planar Free Space Optics Opto-Electronic MCM Opto-Electronic PCB

Aims and Advantages The project aims to develop an opto-mechanical interface between OE-MCM components and the waveguides integrated in an OE-PCB system. The three types of communication do not require different drivers and I/O devices. Regardless of the type of communication, latency and bandwidth can become virtually identical. The integration of OE-MCM, OE-PCB and fiber is a key enabling technology for the replacement of high latency multistage networks with low latency direct optical interconnections in information systems.

Memory Architecture A Mephisto (ARM) processor is connected both optically and electronically. Custom memory controllers manage multiple RAM chips in what are known as memory banks. Memory banks are logically grouped. The architecture has a low memory latency. Multicast support makes this system well suited to multiprocessor applications. The proposed example application is a real-time JPEG 2000 decoder. Optoelectronics enables the construction of this innovative memory architecture.

Memory Architecture Optoelectronics enables the construction of this innovative memory architecture. A processor is connected both optically and electronically. Custom memory controllers manage multiple RAM chips in what are known as memory banks. Memory banks are logically grouped. The architecture has a low memory latency. Multicast support makes this system well suited to multiprocessor applications. The proposed example application is a real-time JPEG 2000 decoder A sample application is include real-time satellite image decoding.

Memory Architecture

Architectural Overview

System Segmentation

PCB Segmentation

PIFSO Interface

PIFSO and Fibre Interface

Assembly (PCB-MCM-OE)

Assembly (PIFSO-MCM-PCB)

Assembly – Optical Path