Thermal arm-wrestling Design of a video game using two programmable flags (PF) interrupts Tutorial on handling 2 Hardware interrupts from an external device that cause the same IVG12 PF- Interrupt A

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada2 / 24 + extras Problem to be solved Customer game concept I WINYOU WIN Has two TMP03 thermal sensors and a ready signal (LED) At the ready signal – the two players have to use bio-feedback to move the cursor into the winning area Three play modes One person player – moves the cursor with one sensor One person player – controls the cursor with two sensors sort of EXO-Sketch mode Game mode – two players Sensor reading is determined by the difference in temperature NOW compared to the temperature at the ready signal

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada3 / 24 + extras Customer game plan Player1_TemperatureNow, and Player1_TemperatureStart Ditto player 2 While not started { Determine Player1 Temperature, Player2 temperature Update Game Screen with start information } Cursor is centered – update Game screen While nobody has won { Determine Player1 Temperature, Player2 temperature Determine Player1, player2 difference in temperature if player1 difference larger then decrease cursor, else cursor ++ Update Game screen Determine if somebody has won } Display winning message

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada4 / 24 + extras 5 – Need to handle the “true PF registers” to generate a hardware interrupt Functions needed  unsigned long int SetPFInterruptsASM( ??) Returns old interrupt settings Set new settings  void StartPFInterruptsASM(???)  void StopPFSettingsASM(???)  Hardware information Chapter 14

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada5 / 24 + extras PF registers  Direction, Data, Polarity and Enable all from Lab. 2  Flag Mask registers – Flag mask Interrupt data register – basically which PF pins have been set to allow to cause interrupt Flag mask Interrupt Set register – sets PF pin that is allowed to cause an interrupt, without the need for a read – or mask – write operation Flag Mask Interrupt Clear register – which PF pin is no longer allowed to cause an interrupt without the need for a read – and mask – write operation Flag interrupt Sensitivity register (FIO_EDGE) – set for edge-sensitive – also need FIO_BOTH

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada6 / 24 + extras 6 – Build a test to show that write the needed code (in ASM) to set up the PF interrupts Registers described in Chapter 14  Stop all interrupts for the moment – CLI instruction  Need to set FIO_MASKA_D bits 1 Write only needed if “set” using FIO_MASK_S register  Need to set FIO_POLAR for active rising edge – Lab 2 code 1 read – then mask – then 1 write  Need to set FIO_INEN (R – mask – W)  Need to set FIO_DIR (R – mask – W)  Need to clear FIO_FLAG_D so that don’t think interrupt already happened (1W if use FIO_FLAG_C register approach))  Need to set FIO_EDGE and FIO_BOTH (2R – mask 2W)  Restart interrupts – STI instruction – but with PF interrupt stopped Possibility that missing stuff since first time tried this

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada7 / 24 + extras First Test for Set up PF interrupts

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada8 / 24 + extras Need to do code review  After fixing the error – get this result  Check code – need to return old interrupt level FIO_MASKA_D – that requires a read that I had not designed in – change the test

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada9 / 24 + extras Move onto setting FIO_FLAG registers

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada10 / 24 + extras Check Ability to turn off PF interrupts

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada11 / 24 + extras Test for interrupts using switches PF interrupts active NOTHING HAPPENING SYSTEM IS HUNG

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada12 / 24 + extras Turns out – missing stuff in set up  IMASK -- Page 4-33 Global register – allows IVG12 interrupts to occur  SIC_IMASK – Page 4-28 System interrupt mask – especially for peripheral devices Enabling PF Interrupt A during SetUpPFInterrupts( ) fixed the problem of getting INTO interrupts – but the function never came out BECAUSE  Bit 11 of FIO_FLAG_D MUST BE CLEARED inside interrupt service routine – clearing the interrupt bit!!!!!!

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada13 / 24 + extras What is the necessary code for the C++ interrupt service routine to handle the PF11 interrupts?  Add your code here  Essentially 3 lines of code needed

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada14 / 24 + extras Add this stage  Either PF11 interrupt  Need PF10 interrupt  Need both

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada15 / 24 + extras Core timer interrupt PF interrupt  Core timer interrupt register_handler(ik_timer, CoreTimerISR)  PF11 interrupt register_handler(ik_ivg12, PF11_ISR);  PF10 interrupt register_handler(ik_ivg12, PF10_ISR);  If Core timer and PF11 interrupts occurred – different interrupt levels  If Core timer and PF10 interrupts occurred – different interrupt levels  If PF11 and PF10 interrupts occurred – SAME interrupt level

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada16 / 24 + extras PF11 and PF10 interrupt PF interrupt PF11 and PF10 interrupt register_handler(ik_ivg12, PF_ISR); ISR code must look like this EX_INTERRUPT_HANDLER(PF_ISR) {  If this interrupt was caused by PF11 interrupt – then do this action – CalculatePF11Temperature( );  But if this interrupt was caused by PF10 interrupt – then do this action – CalculatePF10Temperature( );  Clear the correct interrupt flag so the ISR can exit properly }

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada17 / 24 + extras What hardware register can tell us which of the two PF lines caused an interrupt?  See hardware manual on page for the information

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada18 / 24 + extras What is the necessary code for the C++ interrupt service routine to handle the PF10 interrupts?  Add your code here  Essentially 3 lines of code needed

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada19 / 24 + extras PF11 interrupt test

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada20 / 24 + extras PF10 test

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada21 / 24 + extras Can handle both PF10 and PF11 interrupts – but ISR can’t tell the different

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada22 / 24 + extras Can handle both PF10 and PF11 interrupts – but ISR CAN tell the different

6/2/2015 Thermal Arm Wrestling, Copyright M. Smith, ECE, University of Calgary, Canada23 / 24 + extras  Information taken from Analog Devices On-line Manuals with permission s/ s/  Information furnished by Analog Devices is believed to be accurate and reliable. However, Analog Devices assumes no responsibility for its use or for any infringement of any patent other rights of any third party which may result from its use. No license is granted by implication or otherwise under any patent or patent right of Analog Devices. Copyright  Analog Devices, Inc. All rights reserved.