Laboratoire de l’Accélérateur Linéaire (IN2P3-CNRS) Orsay, France 6 February 2003 Status of SPECS  SPECS-SLAVE architecture I2C implementation JTAG implementation Parallel bus  SPECS-SLAVE board JTAG/I2C  development schedule

Electronic workshop February 2003 D.Charlet Specs-Slave chip JTAGI2C SPECS Bus SDA_MS 40MHz Clk Reset* SlaveAddress[7:0] PBA [3:0] (PartialBroadcast Address) SCL_MS SDA_SM SCL_SM SPECS slave TDO TMS TCK TDI JTAG SPECS CTRL Local bus I2C SDA return SCL Bus_CS[7:0] SCLreturn Compoment SX- A32 SX- A32 + PQ208 package + PQ208 package - All I/Os fixed at the same voltage - All I/Os fixed at the same voltage AX-125 AX n I/O Banks for different voltages + n I/O Banks for different voltages + new familly from ACTEL + new familly from ACTEL + internal ressources + internal ressources - BGA packages (FG 256) - BGA packages (FG 256) - Bigger what we need - Bigger what we need Parallel Bus Data [7:0] NTA [15:0] Subadd [7:0] Bytenumber [3:0] ChipSelect * [7:0] Read* Write* UserInterrupt FIFOempty *

Electronic workshop February 2003 D.Charlet Architecture of SPECS slave FPGA

Electronic workshop February 2003 D.Charlet SDA SCL On detector Remote board OC I2C inter- face SPECS slave board Chip detector SCL SDA I2C Hardware Implementation

Electronic workshop February 2003 D.Charlet I2C SPECS Characteristics Characteristics 7bit addressing capability No capability for handshake resynchronisation Bandwidth 1Mb/s Transfer rate 45kByte/s for one Byte access Maximun transfer rate 122kByte/s for 31Byte data frame I2C Acknowledgement locally managed by SPECS- SLAVE

Electronic workshop February 2003 D.Charlet TDI TMS TCK TDO On detector Remote board SPECS slave board JTAG inter- face JTAG bus LSbMSb data[0:7] 1 bit= 100 ns LSbMSb data[0:7] 1 bit= 100 ns TDI TMS TRst TCK=1 TDI TMS TRst TCK=0 Half word JTAG output register JTAG Hardware Implementation Characteristics bandwidth 1Mb/s 122kByte/s for 31Byte frame

Electronic workshop February 2003 D.Charlet SPECS Slave board JTAG or I2C Bus RJ45 JTAG or I2C DIFFERENTIAL LINK En/dir en/dir[15] RJ45 JTAG or I2C DIFFERENTIAL LINK En/dir en/dir[0] 8 BUSSES MS_SDA SM-SCL SM_SDA MS_SCL SPECS SLAVE Actel 54SX?? JTAG Bus I2C Bus BACKPLANE CONNECTOR SPECS + TTC SPECS SLAVE BOARD RJ45 Front panel SPECS connector 2

Electronic workshop February 2003 D.Charlet PCI connector PC mother board PCI SPECSmaster LVDS drivers 2 SPECS Masters + 1 SPECS Slave APEX 20K100E PQFP 240 PCI target interface PLX 9030 PQFP 176 RJ45 JTAG LVDS bus I2C LVDS bus SPECS LVDS bus PCI bus PLX local busSPECS bus RJ45 PCI SPECS Prototype Master Board LVDS drivers LVDS drivers LVDS drivers Firmware version 2.0 beta

Electronic workshop February 2003 D.Charlet   FIRMWARE Development in Verilog language and synthesis with SYNPLIFY   Slave SPECS_SLAVE targeted on APEX : receiver, parallel interface, I2C curently under test. Routing (20% of the logic cells in an APEX 20K100 or 34% of the logic cells in a SX32-A) including parallel interface and I2C interface.   Master SPECS_MASTER targeted on APEX : SPECS transfer, PLX bus interface currently under test. Routing (28% of the logic cells in an APEX 20K100 and 61 % of the ESBs) including 2 FIFOs of 256x32b. Status of Specs firmware version 1

Electronic workshop February 2003 D.Charlet   HARDWARE:   PLX9030 Internal register access and reconfiguration of PLX’s configuration EEprom have been tested. Local bus access in ‘target single read/write’ PCI mode to the SPECS Master has been tested. Master board : LVDS output no tested.   SOFTWARE   WINDOWS NT PCI driver delivered by PLX(SDK-PRO). Tested in ‘target single read/write’ but not in burst mode. Windows interface (PLXMON) has been use to access and configure PLX. SPECS master-board & SPECS slave libraries developped in C code.   LINUX Linux driver delivered by PLX (SDK-PRO). Not yet tested. Status of PCI board version 2.0

Electronic workshop February 2003 D.Charlet Schedule for the SPECS system Firmware version 2.0 Beta PCI Master board vesrsion 1 Firmware version 2.0 Windows Software FebruaryMarchApril Version 2.1 Documentation Linux Software May PCI Master board version 2 JuneJuly SPECS-Slave board