GALAXY Project Final project review IHP, February 4th 2011 Tools Demonstration Dr Lilian Janin, Dr Doug Edwards - University of Manchester

2 GALAXY Project - Tools Demonstration Previous Demo: Calculator

3 GALAXY Project - Tools Demonstration Previous Demo: Calculator System: 3 components: Keyboard, LCD, Mini-processor Multiple implementations of each component: SystemC/C++, Verilog Demonstration of different co-simulations SystemC + Verilog FPGA + SystemC Based on prototype IDE

4 GALAXY Project - Tools Demonstration Overview of current demo System: Image processor 4 components: Webcam, Keypad, VGA output, Image Processor Multiple implementations of each component: SystemC/C++, Verilog, VHDL, STG Demonstration of Bringing together GALS design, commercial and open-source tools in a hardware- software-FPGA co-simulation flow

5 GALAXY Project - Tools Demonstration Image processing demo

6 GALAXY Project - Tools Demonstration Demo Contents Frame Grabber Keypad Image Processor VGA Output 1. Component creation from library All simulated in software at TLM level SystemC Legend:

7 GALAXY Project - Tools Demonstration Demo Contents Frame Grabber Keypad Image Processor VGA Output 2. Connecting a real webcam Multiple component implementations SystemC Legend:

8 GALAXY Project - Tools Demonstration Demo Contents Frame Grabber Keypad Image Processor VGA Output 3. Interface refinement to pin level SystemC TLM + transactors SystemC Transactor Legend:

9 GALAXY Project - Tools Demonstration Demo Contents Frame Grabber Keypad Image Processor VGA Output 4. Port from SystemC to Verilog/VHDL Using open-source Opencores IPs SystemC Verilog/V HDL Router Transactor Legend:

10 GALAXY Project - Tools Demonstration Demo Contents Frame Grabber Keypad Image Processor VGA Output 5. Iterative port to FPGA Routing & co-simulation Hardware-Software SystemC FPGA Router Transactor Legend:

11 GALAXY Project - Tools Demonstration Demo Contents Frame Grabber Keypad Image Processor VGA Output 6. Final Hardware FPGA Legend:

12 GALAXY Project - Tools Demonstration Stage 1: System creation & simulation Frame Grabber Keypad Image Processor VGA Output 1. Component creation from library All simulated in software at TLM level SystemC Legend:

13 GALAXY Project - Tools Demonstration Stage 1: System creation & simulation The user: Creates 4 components Creates connections between components Sets every component to use SystemC simulator Starts simulation, showing: Tool flow view Execution window Keypad and output image Input read from file

14 GALAXY Project - Tools Demonstration Stage 2: Using real webcam Frame Grabber Keypad Image Processor VGA Output 2. Connecting a real webcam Multiple component implementations + trace viz SystemC Legend:

15 GALAXY Project - Tools Demonstration Stage 3: Interface refinement Frame Grabber Keypad Image Processor VGA Output 3. Interface refinement to pin level SystemC TLM + transactors SystemC Transactor Legend:

16 GALAXY Project - Tools Demonstration Stage 4: SystemC to Verilog Frame Grabber Keypad Image Processor VGA Output 4. Port from SystemC to Verilog/VHDL Using open-source Opencores IPs SystemC Verilog/V HDL Router Transactor Legend:

17 GALAXY Project - Tools Demonstration Stage 4: SystemC to Verilog The user: Switches component implementations from SystemC to Verilog Creates connections Using ports Using buses Reuses Opencores IP VGA controller

18 GALAXY Project - Tools Demonstration Tutorial Contents Frame Grabber Keypad Image Processor VGA Output 5. Mixed FPGA prototyping Routing & co-simulation Hardware-Software SystemC FPGA Router Transactor Legend:

19 GALAXY Project - Tools Demonstration Stage 5: Software simulators to FPGA Import FPGA library Clock and Reset modules Connect clock and reset signals of all modules Start the co-simulation host-fpga Program ARM CPU Program Virtex FPGA Remote execution of Xilinx tools Monitor output

20 GALAXY Project - Tools Demonstration Tutorial Contents Frame Grabber Keypad Image Processor VGA Output 6. Everything in Hardware FPGA Legend:

21 GALAXY Project - Tools Demonstration Stage 6: Final Hardware Replaced ASIP-routed serial communications by wireless transceivers Input using UART IP from Opencores (Transceivers use serial protocol) Everything compiled using Xilinx flow

22 GALAXY Project - Tools Demonstration Conclusions Demonstrated: Interoperability framework between existing open and commercial CAD tools Ability to execute remotely server-based tools Co-simulation of heterogeneous systems at mixed levels of abstraction Component-based design Opencores IP re-use FPGA protoyping

23 GALAXY Project - Tools Demonstration