Department of Electrical & Computer Engineering Advisor: Professor Michael Zink Team: Brigit Lyons Fadi Maalouli Tony Panetta Renzo Silva Comprehensive Design Review

Outline System Overview CDR Deliverables Android Application Bluetooth Communication Demo Hard drive read/write and UI Hardware Encryption FPR Goals Department of Electrical & Computer Engineering 2

System Overview Department of Electrical & Computer Engineering 3

CDR Deliverables Android Application: User login/authentication Send encryption key to security device Security Device: Communication between development board and Bluetooth module Encryption algorithm working on development board Research OS libraries for read/write from hard drive Department of Electrical & Computer Engineering 4

Android Application Basics Connect to security device via Bluetooth, verify user credentials, then send master encryption key to security device Department of Electrical & Computer Engineering 5

Android User Authentication Requires Username and Password – Both username and master encryption key are encrypted with AES128 using password as key – Stored in SharedPreferences User submits username and password – Username is encrypted with password and compared to stored username cipher If comparison is valid, stored master encryption key unencrypted with password and sent to security device Department of Electrical & Computer Engineering 6

Android Password Recovery At account creation, user picks security question and answers it Security question is encrypted using answer as key and is stored in SharedPreferences – Generated master encryption key is also encrypted with security answer and stored At password recovery, correct security question/answer are used to retrieve clear text master encryption key Department of Electrical & Computer Engineering 7

Security Device DE2 board faster and more efficient – Cyclone II FPGA – Memory: 8 MB SDRAM, 512 KB SRAM, 4 MB Flash – I/O interfaces: RS232, USB, Ethernet… Bluetooth module – signals at a rate of up to 464 Kbps – very low power consumption – high speed UART – RS232 interface Department of Electrical & Computer Engineering 8

Bluetooth Communication Department of Electrical & Computer Engineering 9

Demo Department of Electrical & Computer Engineering 10

Department of Electrical & Computer Engineering 11 Encryption Hardware Two separate modules… EncryptDecrypt Sbox Key Expand Rcon Inverse Sbox Key Expand Rcon

Department of Electrical & Computer Engineering 12 Encryption Control Logic I/O To Text In FIFO I/O To Key FIFO I/O To Text Out FIFO clk clk, reset, end_of_text_in, enc_or_dec, aes_start, key_recv_rdy, key, text_in_recv_rdy, text_in, text_out_send_rdy, text_out_write_req, /*enc_done, dec_done, dec_key_rdy,*/ key_read_req, text_in_read_req, text_out, enc_go, dec_go, dec_key_go reset enc_or_dec aes_start end_of_text_in key_recv_rdy key key_read_req text_in_recv_rdy text_in text_in_read_req text_out_send_rdy text_out text_out_write_req enc_go enc_done text_in key dec_go dec_done dec_key_go dec_key_done I/O To Encrypt/Decrypt Modules I/O To System AES_TOP

Department of Electrical & Computer Engineering 13 Encryption Control FSM

Department of Electrical & Computer Engineering 14 Encryption Control FSM Design WAIT OUTPUT DONE DECRYPT DONE ENCRYPT DONE DECRYPT DEC KEY WAIT DEC KEY LOAD ENC WAIT ENCRYPT READ INPUTS WAIT INPUTS REQUEST INPUTS IDLE DEC WAIT

Department of Electrical & Computer Engineering 15

Department of Electrical & Computer Engineering 16 NIOS DE2 AES_KEY_FIFO_8_128 :inputk_fifo AES_IN_FIFO_32_128 : input_fifo AES_ENC:aes_unit AES_OUT_FIFO_128_32: output_fifo4 key_pio[8:0] key_isfull key_write_req.data[8:0].wrfulll.wrreq wrclkrdclkaclr q[128:0].rdreq.rdempty data_pio[32:0] data_isfull_pio data_wreq_piodata_pio[32:0] result_ready_pio data_wreq_pio.data[32:0].wrfulll.wrreq q[128:0].rdreq.rdempty aclrrdclkwrclk.data[32:0].wrfulll.wrreq q[128:0].rdreq.rdempty aclrwrclkrdclk

FDR Goals Department of Electrical & Computer Engineering 17

Department of Electrical & Computer Engineering 18 Questions?