Serial I/O Communication

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Presentation transcript:

AVR UART Serial I/O KyungHee Univ.

Serial I/O Communication UART(Universal Asynchronous Receiver/Transmitter). DTE(Data Terminal Equipment) DCE(Data Communication Equipment) UART DTE DCE Interface KyungHee Univ.

USART(Universal Synchronous and Asynchronous Receiver/Transmitter) Block Diagram KyungHee Univ.

USART and Asynchronous Communication Serial frame format Every frame will have at least 1 start bit data bits (5,6,7,8 or 9) 1-2 stop bit Parity is optional KyungHee Univ.

USART and Asynchronous Communication Start Bit 를 Sampling 하기 위하여 16배 속도의 내부 Clock를 사용 한다. 중간 부분에서 3번 Sampling 하여 2개 이상이 0 이면 0, 2개 이상이 1이면 1로 결정 한다. . KyungHee Univ.

Error detection : Parity Data bits의 XOR에 의하여 Parity Bit를 생성 한다. Parity는 Even 과 Odd Parity 로 구분 한다. Peven= dn XOR dn-1 XOR dn-2 ........ XOR d0 XOR 0 Podd= dn XOR dn-1 XOR dn-2 ........ XOR d0 XOR 1 data bits Parity Bit KyungHee Univ.

Error detection : Frame error Frame Error : Stop Bit 가 발견 되지 않는 경우 첫 번째 Stop bit가 0으로 검출되는 경우 Data Overrun Error : 수신 버퍼에 현재 읽지 않은 데이터가 들어있는 상태에서 새로운 데이터가 수신 완료되고, 그 다음 수신 데이터인 Start bit가 검출된 경유 Stop bits KyungHee Univ.

Logic(0,1)의 전압 USART and Asynchronous Communication TTL Logic : 0V, 5V RS-232 : -12V, +12V MAX232 : Negative와 Positive 전압을 발생 시키는 Charge pump 기능을 포함 함. KyungHee Univ.

Serial Communication에 사용하는 Connector 예 간단한 RS232 Cable 연결 예 KyungHee Univ.

ATmega128 USART UART : Universal Asynchronous Receiver and Transmitter Asynchronous: 두 장치간에 clock 을 공유 하지 않는다. Synchronous: clock 을 공유 한다. USART : UART 의 기능과 Synchronous Communication을 포함 하고 있다. Baud rate : 매 초간 전달(수신, 송신)되는 Symbol의 수 Data rate : 매 초간 전달(수신, 송신)되는 Data 수 Data rate = Baud rate / Frame Bits(Data Bits + Start,Stop, Parity Bits) KyungHee Univ.

ATmega128 USART USART0 : Port E 사용 USART1 : Port D 사용 PE0: Receive Pin PE1: Transmit Pin PE2: External Clock USART1 : Port D 사용 PD2: Receive Pin PD3: Transmit Pin PD5: External Clock KyungHee Univ.

USART Programming Interface UDRn: 8-bit Data Register UBRRnH and UBRRnL: Baud Rate Registers ( n은 0 또는 1) 2개의 8-bit registers UCSRnA, UCSRnB, UCSRnC: Control and Status Registers KyungHee Univ.

USART Data Registers UDRn(Usart 0,1 I/O Data Register) UDRn은 TXBn(송신버퍼)/RXBn(수신버퍼) 레지스터로 구성되고, 같은 I/O 주소를 갖는다. 송신할 때는 TXBn에 데이터를 Write 하고, 수신할 때는 RXBn의 테이터를 Read 한다. KyungHee Univ.

Baud Rate Registers USART internal clock 은 the UBRR register에 의하여 설정 된다. 12 bits Baud Rate Rg UBRR의 값은 UBRR = (System Clock / 16XBaud Rate) – 1 주의 : UBBRnH Write 후 UBBRnL를 나중에 Write 하여야 한다. KyungHee Univ.

UBRR register 값과 baud rates 예 KyungHee Univ.

UCSRnA(USART Control and Status Register A) Bit 7 – RXCn(USART Receive Complete) Bit 6 – TXCn(USART Transmit Complete) Bit 5 – UDREn(USART Data Register Empty) Transmit Buffer (UDRn)의 상태를 표시 한다. Bit 4 – FEn(USART Frame Error) Bit 3 – DORn(USART Data Overrun Error) Bit 2 – UPEn(USART Parity Error) Bit 1 – U2Xn(Double the USART Transmission Speed) U2Xn = 1 : 비동기 모드에서 클럭의 분주비를 16에서 8로 낮추어 전송속도를 2배 높이는 기능. Bit 0 – MPCMn(USART Multi-Processer Communication Mode) KyungHee Univ.

UCSRnB(USART Control and Status Register B) Bit 7 – RXCIEn(USART RX Complete Interrupt Enable) Bit 6 – TXCIEn(USART TX Complete Interrupt Enable) Bit 5 – UDRIEn(USART Data Register Empty Interrupt Enable) Bit 4 – RXENn(USART Receiver Enable) Bit 3 – TXENn(USART Transmitter Enable) Bit 2 – UCSZn2(USART Character Size) UCSTnC 의 UCSZn1:0 와 함께 사용 함. Bit 1 – RXB8n(USART Receive Data Bit 8) Bit 0 – TXB8n(USART Transmit Data Bit 8) KyungHee Univ.

UCSRnC(USART Control and Register C) Bit 6 – USMSELn(USART Mode Select) USMSELn = 1 : 동기전송모드 USMSELn = 0 : 비동기전송모드 Bit 5, 4 – UPMn1, UPMn0(USART Parity Mode) fdevopen UPMn0 Parity Mode Disabled 1 (Reserved) Enabled, Even Parity Enabled, OddParity KyungHee Univ.

UCSRnC(USART Control and Register C) Bit 3 – USBSn(USART Stop Bit Select) USBSn = 0 : 1 Stop bits USBSn = 1 : 2 Stop bits Bit 2, 1 – 다음 페이지 참고요 Bit 0 – UCPOLn(USART Clock Polarity) 동기 전동 모드에서만 사용. UCPOLn = 1 : 송신데이터는 XCKn Clock Falling Edge에서, 출력 수신데이터는 XCKn Clock Rising Edge 에서 검출 UCPOLn = 0 : 송신데이터는 XCKn Clock Rising Edge 에서, 출력 수신데이터는 XCKn Clock Falling Edge에서 검출 KyungHee Univ.

UCSRnC(USART Control and Register C) Character Size : UCSZn2(UCSRnB: Bit2 ), UCSZn1, UCSZn0의 설정에 따라 5-9Bits 로 결정 된다. UCSZn2 UCSZn1 UCSZn0 Character Size 5-Bit 1 6-Bit 7-Bit 8-Bit Reserved 9-Bit KyungHee Univ.

ATmega128 USART 프로그램 예 cho_uart_basic_i_o 참고 요 KyungHee Univ.