Binary Counters Integer Representations towards Efficient Counting in the Bit Probe Model (presented at TAMC 2011) Gerth Stølting Brodal (Aarhus University) Mark Greve (Aarhus University) Vineet Pandey (BITS Pilani, India) S. Srinivasa Rao (Seoul, South Korea) University of Ljubljana, October 12, 2011

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we are counting modulo = 16 10

1011 1∙ ∙ ∙ ∙2 0 = =

DecimalBinary b3b2b1b0b3b2b1b0 b0b0 0 1 b1b1 b2b2 b3b Reads 4 bits Writes 4 bits DecimalBinary DecimalBinary Algorithm 20

DecimalBinaryReflected Gray code "To get the next code, for a code with even parity, flip the rightmost bit. For a code with odd parity, find the rightmost ‘1’ and flip the bit to its left. The only special case is when the last bit b n is the only ‘1’ in the code. This is also the last code in the sequence." DecimalBinaryReflected Gray code Always reads 4 bits Always writes 1 bit ---0 b0b0 b1b1 b2b b2b2 b2b2 b2b2 b1b b3b3 0 1 b3b3 b3b3 b3b3 b3b3 b3b3 b3b3 b3b3 b3b2b1b0b3b2b1b0 21

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Question Does there exist a counter where one never needs to read all bits to increment the counter ? 23

Decimal Decimal Decimal b3b2b1b0b3b2b1b b0b0 b1b1 b1b b3b3 b3b3 b3b3 b2b2 0 1 Always reads 3 bits Always writes ≤ 2 bits [B., Greve, Pandey, Rao 2011] 24

y 3 y 2 y 1 y 0 x n-5 x n-6 ∙∙∙ x 2 x 1 x 0 Generalization to n bit counters Y 4 bits 3 reads 2 writes X n-4 bit Gray code n-4 reads 1 writes metode Increment(YX) inc(X) if (X == 0) inc(Y) Always reads n-1 bits Always writes ≤ 3 bits [B., Greve, Pandey, Rao 2011] 25 test needs to read all bits of X

Theorem 4-bit counter 3 reads and 2 writes n-bit counter n-1 reads and 3 writes Open problems n-1 reads and 2 writes, n>4? « n reads and writes ? [number of reads at least log 2 n] b0b0 b1b1 b1b b3b3 b3b3 b3b3 b2b2 0 1 n=5 ? ? bits read bits written 26

Redundant Counters Represent L different values using d > log L bits Efficiency E = L / 2 d 27

b n b n-1 ∙∙∙ b log n b log n-1 ∙∙∙b 0 Redundant counter with E = ½ (L = 2 n ) X L log n bits Gray code log n reads 1 write X H n-log n bits 1 read 1 write standard binary counter with delayed increment Idea: Each increment of X L performs one step of the delayed increment of X H n+1 bits2 n valueslog n + 2 reads3 writes [B., Greve, Pandey, Rao 2011] carry 1 bit 1 read 1 write 28

ValuecarryXHXH XLXL Redundant counter with E = 1/2 increment … Value = Val(X L ) + 2 |X L | ·(Val(X H )+ carry·2 Val(X L ) ) n+1 bits2 n valueslog n + 2 reads3 writes 29

ValuecarryXHXH XLXL Redundant counter with E = 1/2 n+1 bits2 n valueslog n + 3 reads2 writes delayed reset 30 increment …

b n+t-1 ∙∙∙ b n b n-1 ∙∙∙ b log n b log n-1 ∙∙∙b 0 Redundant counter with E = 1-1/2 t X L log n bit Gray code log n reads 1 write X H n-log n bits 1 read 1 write delayed standard binary counter ”Carry” : part of counter = t -3, set = 2 t -2, clear 2 t -1 n+t bits (2 t -1)·2 n values log n+t+1 reads3 writes [B., Greve, Pandey, Rao 2011] ”carry” t bits t read 1 write 31

Redundant Counters EfficiencySpaceReadsWrites 1/2n + 1 log n + 23 log n /2 t n + t log n + t + 13 log n + t + 22 Open problem 1 write and « n reads ? 32

Addition of Counters Numbers in the range 0..2 n -1 and 0..2 m -1 (m ≤ n) SpaceReadsWrites n + O(log n) Θ(m + log n) Θ(m)Θ(m) n + O(loglog n) Θ(m + log n·loglog n) n + O(1) Θ(m + log 2 n) Idea: log n blocks of 2 0,2 1,2 2,…,2 i,2 i+1,… bits A 4 A 3 A 2 A 1 A 0 B 2 B 1 B 0 m n flag = B i max value ? 33

[1] Bose, Carmi, Jansens, Maheshwai, Morin, Smid, SWAT 2010 [3] Gray, Patent 1953 [4] Rahman, Munro, Algorithmica

Thank You Gerth Stølting Brodal Aarhus University