Introduction to Layout

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Presentation transcript:

Introduction to Layout Jack Ou, Ph.D. CES 522 V VLSI Design Sonoma State University

Flow Chart

Cross Sectional of an Inverter

S S D D Mask Set

Basic Ingriedents n-well (N_WELL) Polysilicon (POLY) n+ diffusion p+ diffusion contact metal

Manufacturing the n-well Grow a protective Layer of oxide. Remove oxide in selected region Ion Implantation

Poly silicon (doped to make good conductor, Block n+ diffusion) n-diffusion

p-diffusion, contacts and metal Thick metal oxide provides insulation p+ diffusion is made selectively using silicon dioxide and photo resist

λ λ is half of the smallest feature size In 0.18 um, λ is 0.09 um λ based design rules makes it easy to migrate from one process to process. Industrial design rules are usually specified in microns, which makes it difficult to migrate to a more advanced process.

Simplified λ based design rules

Example from tsmc 0.18 um process POLY has a width of 2 λ Contacts are 2 λ x 2 λ

Design Rules

Schematic/Layout of an Inverter VDD p+ diffision n+ diffision Ground

Schematic/Layout of a NAND2 VDD p+ diffision n+ diffision Ground

Substrate Contact

P_WELL

P_WELL+P_PLUS_SELECT

P_WELL+P_PLUS_SELECT+Active(43)

P_WELL+P_PLUS_SELECT+Active(43)+Contact to Active

P_WELL+P_PLUS_SELECT+Active(43)+Contact to Active+Metal1

Nwell Contact

NWELL

NWELL+N_Plus_Select+

NWELL+N_Plus_Select+Active Layer

NWELL+N_Plus_Select+Active Layer+Contact to Active Layer

NWELL+N_Plus_Select+Active Layer+Contact to Active Layer+Metal 1

DRC

DRC Check: to run DRC First: to see the first DRC violation Next: to step through the DRC errors

DRC Results DRC violation

Use the Rule Deck to Repair the Layout

Repaired Layout Enlarged N Plus Select Reduced Result Count