Caltech CS184a Fall2000 -- DeHon1 CS184a: Computer Architecture (Structures and Organization) Day20: November 29, 2000 Review.

Slides:



Advertisements
Similar presentations
Critical Reading Strategies: Overview of Research Process
Advertisements

Slide 1Michael Flynn EE382 Winter/99 EE382 Processor Design Stanford University Winter Quarter Instructor: Michael Flynn Teaching Assistant:
Reconfigurable Computing CS294-6 Fall 1998 Dr. Andre DeHon.
Lecture 9: Coarse Grained FPGA Architecture October 6, 2004 ECE 697F Reconfigurable Computing Lecture 9 Coarse Grained FPGA Architecture.
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day6: October 11, 2000 Instruction Taxonomy VLSI Scaling.
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day1: September 25, 2000 Introduction and Overview.
Balancing Interconnect and Computation in a Reconfigurable Array Dr. André DeHon BRASS Project University of California at Berkeley Why you don’t really.
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day17: November 20, 2000 Time Multiplexing.
CS294-6 Reconfigurable Computing Day 5 September 8, 1998 Comparing Computing Devices.
CS294-6 Reconfigurable Computing Day 6 September 10, 1998 Comparing Computing Devices.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 15: March 12, 2007 Interconnect 3: Richness.
Computational Astrophysics: Methodology 1.Identify astrophysical problem 2.Write down corresponding equations 3.Identify numerical algorithm 4.Find a computer.
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day8: October 18, 2000 Computing Elements 1: LUTs.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 9: February 7, 2007 Instruction Space Modeling.
CS294-6 Reconfigurable Computing Day 10 September 24, 1998 Interconnect Richness.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 26: April 18, 2007 Et Cetera…
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day4: October 4, 2000 Memories, ALUs, and Virtualization.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 11: February 14, 2007 Compute 1: LUTs.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 4: January 22, 2007 Memories.
Trends toward Spatial Computing Architectures Dr. André DeHon BRASS Project University of California at Berkeley.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 1: January 8, 2007 Introduction and Overview.
Penn ESE Spring DeHon 1 FUTURE Timing seemed good However, only student to give feedback marked confusing (2 of 5 on clarity) and too fast.
Penn ESE Spring DeHon 1 ESE (ESE534): Computer Organization Day 5: January 24, 2007 ALUs, Virtualization…
Reducing Cache Misses 5.1 Introduction 5.2 The ABCs of Caches 5.3 Reducing Cache Misses 5.4 Reducing Cache Miss Penalty 5.5 Reducing Hit Time 5.6 Main.
Comparing Computing Machines Dr. André DeHon UC Berkeley November 3, 1998.
Reconfigurable Computing. This Class is About Reconfigurable Computing Computer Architecture Coping with Change.
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 11: March 3, 2014 Instruction Space Modeling 1.
CBSSS 2002: DeHon Architecture as Interface André DeHon Friday, June 21, 2002.
Caltech CS184b Winter DeHon 1 CS184b: Computer Architecture [Single Threaded Architecture: abstractions, quantification, and optimizations] Day3:
Caltech CS184 Winter DeHon CS184: Computer Architecture (Structure and Organization) Day 1: January 3, 2005 Introduction and Overview.
Caltech CS184b Winter DeHon 1 CS184b: Computer Architecture [Single Threaded Architecture: abstractions, quantification, and optimizations] Day12:
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 9: February 24, 2014 Operator Sharing, Virtualization, Programmable Architectures.
1 Computer Architecture Research Overview Rajeev Balasubramonian School of Computing, University of Utah
CBSSS 2002: DeHon Costs André DeHon Wednesday, June 19, 2002.
CALTECH cs184c Spring DeHon CS184c: Computer Architecture [Parallel and Multithreaded] Day 8: April 26, 2001 Simultaneous Multi-Threading (SMT)
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 7: February 6, 2012 Memories.
Computer Organization and Design Computer Abstractions and Technology
L/O/G/O Cache Memory Chapter 3 (b) CS.216 Computer Architecture and Organization.
Caltech CS184 Winter DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 7: January 24, 2003 Instruction Space.
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day18: November 22, 2000 Control.
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 5: February 1, 2010 Memories.
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 1: January 13, 2010 Introduction and Overview.
Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day7: October 16, 2000 Instruction Space (computing landscape)
Caltech CS184 Winter DeHon CS184: Computer Architecture (Structure and Organization) Day 1: January 6, 2003 Introduction and Overview.
CALTECH cs184c Spring DeHon CS184c: Computer Architecture [Parallel and Multithreaded] Day 11: May10, 2001 Data Parallel (SIMD, SPMD, Vector)
Caltech CS184 Winter DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 13: February 6, 2003 Interconnect 3: Richness.
Caltech CS184 Winter DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 8: January 27, 2003 Empirical Cost Comparisons.
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 1: January 11, 2012 Introduction and Overview.
Caltech CS184 Winter DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 5: January 17, 2003 What is required for Computation?
Caltech CS184 Winter DeHon CS184a: Computer Architecture (Structure and Organization) Day 4: January 15, 2003 Memories, ALUs, Virtualization.
Caltech CS184 Winter DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 11: January 31, 2005 Compute 1: LUTs.
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 11: February 20, 2012 Instruction Space Modeling.
CC410: System Programming Dr. Manal Helal – Fall 2014 – Lecture 3.
Caltech CS184 Spring DeHon 1 CS184b: Computer Architecture (Abstractions and Optimizations) Day 10: April 28, 2003 Vector, SIMD.
Caltech CS184 Winter DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 10: January 28, 2005 Empirical Comparisons.
ESE534: Computer Organization
ESE534: Computer Organization
ESE534: Computer Organization
CS184a: Computer Architecture (Structure and Organization)
Cache Memory Presentation I
Lecture 14 Virtual Memory and the Alpha Memory Hierarchy
ESE534: Computer Organization
ESE534: Computer Organization
ESE534: Computer Organization
A High Performance SoC: PkunityTM
ESE534: Computer Organization
CS184a: Computer Architecture (Structures and Organization)
CS184a: Computer Architecture (Structure and Organization)
ESE534: Computer Organization
ESE534: Computer Organization
Presentation transcript:

Caltech CS184a Fall DeHon1 CS184a: Computer Architecture (Structures and Organization) Day20: November 29, 2000 Review

Caltech CS184a Fall DeHon2 Today Review content and themes N.B. EOT Feedback Questionnaire –return end of class in basket –or later to Cynthia (256 JRG)

Caltech CS184a Fall DeHon3 Physical Implementation of Computation: Engineering Problem Implement a computation: –with least resources (in fixed resources) with least cost –in least time (in fixed time) –with least energy Optimization problem –how do we do it best

Caltech CS184a Fall DeHon4 Architecture Not Done Not here to just teach you the forms which are already understood –(though, will do that and give you a strong understanding of their strengths and weaknesses) Goal: enable you to design and synthesize new and better architectures Engineering not Biology

Caltech CS184a Fall DeHon5 Authority/History ``Science is the belief in the ignorance of experts.'' -- Richard Feynman Goal: Teach you to think critically and independently about computer design.

Caltech CS184a Fall DeHon6 Content Overview This quarter: –building blocks and organization –raw components and their consequences Next two quarters: –abstractions, models, techniques, systems –e.g. ISA, Control and Data Flow, caching, VM, processor pipeline, branching, renaming….RISC, VLIW, SuperScalar, Vector, SIMD, ….

Caltech CS184a Fall DeHon7 Content (this quarter) Requirements of Computation Key components: –Instructions –Interconnect –Compute –Retiming –Control

Caltech CS184a Fall DeHon8 Themes (this quarter) Implementation techniques Costs Structure in Computations Design Space –identify and model Parameterization Metrics and Figures of Merit Tradeoffs, analysis Change

Caltech CS184a Fall DeHon9 Computing Device Composition –Bit Processing elements –Interconnect: space –Interconnect: time –Instruction Memory Tile together to build device

Caltech CS184a Fall DeHon10 Peak Computational Densities from Model Small slice of space –only 2 parameters 100  density across Large difference in peak densities –large design space!

Caltech CS184a Fall DeHon11 Yielded Efficiency Large variation in yielded density –large design space! FPGA (c=w=1) “Processor” (c=1024, w=64)

Caltech CS184a Fall DeHon12 Throughput Yield Same graph, rotated to show backside.

Caltech CS184a Fall DeHon13 Architecture Instr. Taxonomy

Caltech CS184a Fall DeHon14 Methodology Architecture model (parameterized) Cost model Important task characteristics Mapping Algorithm –Map to determine resources Apply cost model Digest results –find optimum (multiple?) –understand conflicts (avoidable?)

Caltech CS184a Fall DeHon15 Mapped LUT Area

Caltech CS184a Fall DeHon16 Resources  Area Model  Area

Caltech CS184a Fall DeHon17 Control: Partitioning versus Contexts (Area) CSE benchmark

Caltech CS184a Fall DeHon18 Design Space Mindset Methodology Decomposition –fundamental building blocks –basis set Build Intuition on Space –grounded in quantifiable instances

Caltech CS184a Fall DeHon19 Change A key feature of the computer industry has been rapid and continual change. We must be prepared to adapt. For our substrate: –capacity (orders of magnitude more) what can put on die, parallelism, need for interconnect and virtualization, homogeneity –speed –relative delay of interconnect and gates

Caltech CS184a Fall DeHon20 Fountainhead Parthenon Quote “Look,” said Roark. “The famous flutings on the famous columns---what are they there for? To hide the joints in wood---when columns were made of wood, only these aren’t, they’re marble. The triglyphs, what are they? Wood. Wooden beams, the way they had to be laid when people began to build wooden shacks. Your Greeks took marble and they made copies of their wooden structures out of it, because others had done it that way. Then your masters of the Renaissance came along and made copies in plaster of copies in marble of copies in wood. Now here we are making copies in steel and concrete of copies in plaster of copies in marble of copies in wood. Why?”

Caltech CS184a Fall DeHon21 What About Computer Architecture? Are we making copies in submicron CMOS VLSI of copies in NMOS of copies in TTL of early vacuum tube computer designs? Mainframe->Mini->super microprocessors ? CDC->Cray1->i860->Vector microprocessors?

Caltech CS184a Fall DeHon Computer Architecture VLSI is “new” to the computer architect you have 15M   in 4  m NMOS want to run “all” programs What do you build?

Caltech CS184a Fall DeHon23 What can we build in 15M  12Kb SRAM (1.2K  bit) 1500 Gate-Array Gates (10K  /gate) 30 4-LUTs (500K /4LUT) 32b ALU+RF+control

Caltech CS184a Fall DeHon24 What…1983?

Caltech CS184a Fall DeHon25 More Why?

Caltech CS184a Fall DeHon26

Caltech CS184a Fall DeHon RISC II MIPs

Caltech CS184a Fall DeHon28 What has changed in 17 years? Technology (0.18  m CMOS) Capacity (50G  Architecture? 2

Caltech CS184a Fall DeHon29 Capacity

Caltech CS184a Fall DeHon30 Architecture (last 17 years) Moved memory system on chip 32->64b datapath +FPU, moved on chip 1->4 or 8 compute units …lots of “hacks” to preserve sequential model of original uP

Caltech CS184a Fall DeHon31 Have our assumptions changed? Beware of cached answers. Always check your assumptions. To stay young requires unceasing cultivation of the ability to unlearn old falsehoods. -- Lazarus Long

Caltech CS184a Fall DeHon Design Landscape

Caltech CS184a Fall DeHon33 Should we still build computers the way we did in 1983? Yesterday’s solution becomes today’s historical curiosity. -- Goldratt

Caltech CS184a Fall DeHon34 Example HP PA-RISC8500 (Hot Chips X) SPEC fits in on-chip cache What next? Does it make sense to keep this architecture and balance as capacity continues to grow? Hopefully, this class has given you some ideas of what else you could do with 100+G 2 …continue with next quarter...

Caltech CS184a Fall DeHon35 Also Ask... What happened in early 1980’s to make RISC possible / the right answer? –Compared to 70’s ?

Caltech CS184a Fall DeHon36 What do I want? Develop systematic design Parameterize design space –adapt to costs Understand/capture req. of computing Efficiency metrics –(similar to information theory?) –[related to last time: how much really need to compute]

Caltech CS184a Fall DeHon37 Big Ideas Matter Computes Efficiency of architectures varies widely Computation design is an engineering discipline Costs change  Best solutions (architectures) change Learn to cut through hype –analyze, think, critique, synthesize

Caltech CS184a Fall DeHon38 Big Ideas Design Space Effects of organization: –Instructions –Interconnect –Compute Block –Retiming –Control Key components of computing device