1 Lecture 9: Floating Point Today’s topics:  Division  IEEE 754 representations  FP arithmetic Reminder: assignment 4 will be posted later today.

Slides:



Advertisements
Similar presentations
Spring 2013 Advising Starts this week! CS2710 Computer Organization1.
Advertisements

Chapter Three.
Computer Organization CS224 Fall 2012 Lesson 19. Floating-Point Example  What number is represented by the single-precision float …00 
Arithmetic in Computers Chapter 4 Arithmetic in Computers2 Outline Data representation integers Unsigned integers Signed integers Floating-points.
Topics covered: Floating point arithmetic CSE243: Introduction to Computer Architecture and Hardware/Software Interface.
Lecture 16: Computer Arithmetic Today’s topic –Floating point numbers –IEEE 754 representations –FP arithmetic Reminder –HW 4 due Monday 1.
Lecture 15: Computer Arithmetic Today’s topic –Division 1.
CMPT 334 Computer Organization Chapter 3 Arithmetic for Computers [Adapted from Computer Organization and Design 5 th Edition, Patterson & Hennessy, ©
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3: IT Students.
Floating Point Numbers
Chapter 3 Arithmetic for Computers. Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let's.
CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (2)
Integer Arithmetic Floating Point Representation Floating Point Arithmetic Topics.
1 Lecture 8: Binary Multiplication & Division Today’s topics:  Addition/Subtraction  Multiplication  Division Reminder: get started early on assignment.
1 Lecture 4: Arithmetic for Computers (Part 5) CS 447 Jason Bakos.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji.
1 Lecture 10: FP, Performance Metrics Today’s topics:  IEEE 754 representations  FP arithmetic  Evaluating a system Reminder: assignment 4 due in a.
Computer ArchitectureFall 2008 © August 27, CS 447 – Computer Architecture Lecture 4 Computer Arithmetic (2)
CS/COE0447 Computer Organization & Assembly Language
Computer Organization and Architecture Computer Arithmetic Chapter 9.
Computer Arithmetic Nizamettin AYDIN
Computer Arithmetic. Instruction Formats Layout of bits in an instruction Includes opcode Includes (implicit or explicit) operand(s) Usually more than.
Computing Systems Basic arithmetic for computers.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /14/2013 Lecture 16: Floating Point Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE.
CH09 Computer Arithmetic  CPU combines of ALU and Control Unit, this chapter discusses ALU The Arithmetic and Logic Unit (ALU) Number Systems Integer.
Oct. 18, 2007SYSC 2001* - Fall SYSC2001-Ch9.ppt1 See Stallings Chapter 9 Computer Arithmetic.
Computer Arithmetic II Instructor: Mozafar Bag-Mohammadi Spring 2006 University of Ilam.
Fixed and Floating Point Numbers Lesson 3 Ioan Despi.
Lecture 9: Floating Point
Computer Arithmetic II Instructor: Mozafar Bag-Mohammadi Ilam University.
CSC 221 Computer Organization and Assembly Language
Floating Point Representation for non-integral numbers – Including very small and very large numbers Like scientific notation – –2.34 × –
Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number.
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Lecture notes Reading: Section 3.4, 3.5, 3.6 Multiplication
CDA 3101 Fall 2013 Introduction to Computer Organization
1 Lecture 10: Floating Point, Digital Design Today’s topics:  FP arithmetic  Intro to Boolean functions.
Chapter 3 Arithmetic for Computers. Chapter 3 — Arithmetic for Computers — 2 Arithmetic for Computers Operations on integers Addition and subtraction.
CSE 340 Simulation Modeling | MUSHFIQUR ROUF CSE340:
CS 232: Computer Architecture II Prof. Laxmikant (Sanjay) Kale Floating point arithmetic.
10/7/2004Comp 120 Fall October 7 Read 5.1 through 5.3 Register! Questions? Chapter 4 – Floating Point.
King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department.
William Stallings Computer Organization and Architecture 8th Edition
Floating Point Representations
Morgan Kaufmann Publishers Arithmetic for Computers
Computer Architecture & Operations I
Lecture 9: Floating Point
CS 232: Computer Architecture II
CS/COE0447 Computer Organization & Assembly Language
Lecture 8: Binary Multiplication & Division
William Stallings Computer Organization and Architecture 7th Edition
Arithmetic for Computers
Lecture 10: Floating Point, Digital Design
ECE/CS 552: Floating Point
Number Representations
Computer Arithmetic Multiplication, Floating Point
ECEG-3202 Computer Architecture and Organization
October 17 Chapter 4 – Floating Point Read 5.1 through 5.3 1/16/2019
Chapter 3 Arithmetic for Computers
Morgan Kaufmann Publishers Arithmetic for Computers
Number Representations
Presentation transcript:

1 Lecture 9: Floating Point Today’s topics:  Division  IEEE 754 representations  FP arithmetic Reminder: assignment 4 will be posted later today

2 Division 1001 ten Quotient Divisor 1000 ten | ten Dividend ten Remainder At every step, shift divisor right and compare it with current dividend if divisor is larger, shift 0 as the next bit of the quotient if divisor is smaller, subtract to get new dividend and shift 1 as the next bit of the quotient

3 Divide Example Divide 7 ten ( two ) by 2 ten (0010 two ) IterStepQuotDivisorRemainder 0Initial values Rem = Rem – Div Rem < 0  +Div, shift 0 into Q Shift Div right Same steps as Same steps as Rem = Rem – Div Rem >= 0  shift 1 into Q Shift Div right Same steps as

4 Efficient Division

5 Divisions involving Negatives Simplest solution: convert to positive and adjust sign later Note that multiple solutions exist for the equation: Dividend = Quotient x Divisor + Remainder +7 div +2 Quo = Rem = -7 div +2 Quo = Rem = +7 div -2 Quo = Rem = -7 div -2 Quo = Rem =

6 Divisions involving Negatives Simplest solution: convert to positive and adjust sign later Note that multiple solutions exist for the equation: Dividend = Quotient x Divisor + Remainder +7 div +2 Quo = +3 Rem = div +2 Quo = -3 Rem = div -2 Quo = -3 Rem = div -2 Quo = +3 Rem = -1 Convention: Dividend and remainder have the same sign Quotient is negative if signs disagree These rules fulfil the equation above

7 Floating Point Normalized scientific notation: single non-zero digit to the left of the decimal (binary) point – example: 3.5 x x 2 -5 two = (1 + 0 x x … + 1 x 2 -6 ) x 2 -5 ten A standard notation enables easy exchange of data between machines and simplifies hardware algorithms – the IEEE 754 standard defines how floating point numbers are represented

8 Sign and Magnitude Representation Sign Exponent Fraction 1 bit 8 bits 23 bits SEF More exponent bits  wider range of numbers (not necessarily more numbers – recall there are infinite real numbers) More fraction bits  higher precision Register value = (-1) S x F x 2 E Since we are only representing normalized numbers, we are guaranteed that the number is of the form 1.xxxx.. Hence, in IEEE 754 standard, the 1 is implicit Register value = (-1) S x (1 + F) x 2 E

9 Sign and Magnitude Representation Sign Exponent Fraction 1 bit 8 bits 23 bits SEF Largest number that can be represented: Smallest number that can be represented:

10 Sign and Magnitude Representation Sign Exponent Fraction 1 bit 8 bits 23 bits SEF Largest number that can be represented: 2.0 x = 2.0 x Smallest number that can be represented: 2.0 x = 2.0 x Overflow: when representing a number larger than the one above; Underflow: when representing a number smaller than the one above Double precision format: occupies two 32-bit registers: Largest: Smallest: Sign Exponent Fraction 1 bit 11 bits 52 bits SEF

11 Details The number “0” has a special code so that the implicit 1 does not get added: the code is all 0s (it may seem that this takes up the representation for 1.0, but given how the exponent is represented, we’ll soon see that that’s not the case) The largest exponent value (with zero fraction) represents +/- infinity The largest exponent value (with non-zero fraction) represents NaN (not a number) – for the result of 0/0 or (infinity minus infinity)

12 Exponent Representation To simplify sort, sign was placed as the first bit For a similar reason, the representation of the exponent is also modified: in order to use integer compares, it would be preferable to have the smallest exponent as 00…0 and the largest exponent as 11…1 This is the biased notation, where a bias is subtracted from the exponent field to yield the true exponent IEEE 754 single-precision uses a bias of 127 (since the exponent must have values between -127 and 128)…double precision uses a bias of 1023 Final representation: (-1) S x (1 + Fraction) x 2 (Exponent – Bias)

13 Examples Final representation: (-1) S x (1 + Fraction) x 2 (Exponent – Bias) Represent ten in single and double-precision formats Single: ( ) Double: ( ) What decimal number is represented by the following single-precision number? …0000

14 Examples Final representation: (-1) S x (1 + Fraction) x 2 (Exponent – Bias) Represent ten in single and double-precision formats Single: ( ) …000 Double: ( ) …000 What decimal number is represented by the following single-precision number? …

15 FP Addition Consider the following decimal example (can maintain only 4 decimal digits and 2 exponent digits) x x Convert to the larger exponent: x x 10 1 Add x 10 1 Normalize x 10 2 Check for overflow/underflow Round x 10 2 Re-normalize

16 FP Addition Consider the following decimal example (can maintain only 4 decimal digits and 2 exponent digits) x x Convert to the larger exponent: x x 10 1 Add x 10 1 Normalize x 10 2 Check for overflow/underflow Round x 10 2 Re-normalize If we had more fraction bits, these errors would be minimized

17 FP Multiplication Similar steps:  Compute exponent (careful!)  Multiply significands (set the binary point correctly)  Normalize  Round (potentially re-normalize)  Assign sign

18 MIPS Instructions The usual add.s, add.d, sub, mul, div Comparison instructions: c.eq.s, c.neq.s, c.lt.s…. These comparisons set an internal bit in hardware that is then inspected by branch instructions: bc1t, bc1f Separate register file $f0 - $f31 : a double-precision value is stored in (say) $f4-$f5 and is referred to by $f4 Load/store instructions (lwc1, swc1) must still use integer registers for address computation

19 Code Example float f2c (float fahr) { return ((5.0/9.0) * (fahr – 32.0)); } (argument fahr is stored in $f12) lwc1 $f16, const5($gp) lwc1 $f18, const9($gp) div.s $f16, $f16, $f18 lwc1 $f18, const32($gp) sub.s $f18, $f12, $f18 mul.s $f0, $f16, $f18 jr $ra

20 Title Bullet