ECE734 VLSI Arrays for Digital Signal Processing Algorithm Representations and Iteration Bound

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu2 Dependence Graph (DG) The basic representation of an algorithm. Shows only dependency among operations. No notion of delay is represented. No loop, cycle allowed. Can be used to represent asynchronous operations. Most useful in exploiting inherent parallelism in the algorithm No implementation or hardware constraint are imposed on DG.

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu3 Data Flow Graph Node: –Computation –Associated with a computing time. Direct edge: –data path and delay Delay: iteration count Example y(n) = a*y(n-1) + b*u(n) The delay of 1 u.t. indicates that to compute y(n+1) in the next iteration depends on result y(n) of the present iteration. Delay labeled with D or positive integer on edges

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu4 DFG Intra-iteration dependency –A direct edge without any delay Inter-iteration dependency –Direct edge with 1 or more delays Node computing delay labeled with parenthesis. Critical path: longest path between … Example: critical path delay = = 8 t.u. Recursive DFG: contains loops. Must have at least one delay element along any loop. Otherwise, the algorithm is NON-computable! D D M0 M1M2 A0 A1 x(n) y(n) (4) (2)

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu5 Loop bound and Iteration bound T {A-B-A} = (2+4)/2 = 3 t.u. T  = max{(2+4)/2, (2+4+5)/1} = max{3, 11} = 11 ABC D 2D (2) (4) (5) AB 2D (2) (4)

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu6 Longest Path Matrix Algorithm Paths are from one delay element to another. Matrix L(m) dimension d by d, d: # of delay elements Element ij (m) = longest computing time from output of d i to input of d j with exactly m  1 delays in between. If no such path exists, ij (m)=  1. Let K = {k; k  [1, d], ik (1) >  1 and kj (m) >  1}, then Once L(m) is computed, the iteration bound can be found as: This algorithm can be easily programmed once L(1) is given.

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu7 LPM Example (Fig. 2.2) lpm.m D D D D (1) (2) d1d1 d2d2 d3d3 d4d4

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu8 Minimum Cycle Mean Algorithm 1.Create a new Graph G d from the given DFG G. Each node of G d is a delay element in G. Edge from node i to node j in G d is the longest path from delay i to delay j in G. So G d can be constructed from non- negative entries of L(1). 2.Compute cycle mean of each cycle in G d. A cycle mean is the average lengths of all eges in a cycle 3.Maximum cycle mean of G d is the maximum cycle (loop) bound of all loops in G and hence is the iteration bound. Algorithm: 1.Compute G c ’ whose edge is negative of that of G. 2.Choose an arbitrary node s, such that f s (0)=0, f k (0) = . 3.Iterations: 4. iteration bound = mcm.m

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu9 Example (Figure 2.4) 1 (1) 2 (2) 3 (1) 4 5 (2) 6 (1) D d2d2 D d1d1 7

ECE734 VLSI Arrays for Digital Signal Processing (C) Yu Hen Hu10 LPM and MCM for Fig. 2.4 LPM Method MCM Method i-m matrix T  = Gd’Gd’ 44 44 88 88 m=0m=1 i=1  12/2  i=2 