ARM Exception Handling

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Presentation transcript:

ARM Exception Handling Chapter 13 ARM Exception Handling (Real-Time Embedded Multithreading : Using ThreadX® and ARM®) Department of Computer Science Hsu Hao Chen Professor Hsung-Pin Chang

Outline Exception Resulting for ARM Exception (Actions) Reset Vector Initialization ThreadX Initialization Thread Scheduling ThreadX Interrupt Handling Internal Interrupt Processing

Exception Resulting for ARM Exceptions resulting for the direct effect of executing an instruction Exceptions resulting as a side effect of executing an instruction Exceptions resulting from external interrupts, unrelated to instruction execution

Exception (Actions) (1/2) Step 1: Save CPSR -> SPSR Step 2: Change to the operating mode corresponding to the exception Step 3: Modify the CPSR of the new operating mode Step 4: Save r15(PC) register -> r14(LR) register Step 5: Change the PC to the appropriate exception vector

Exception (Actions) (2/2)

Reset Vector Initialization(1/2)

Reset Vector Initialization(2/2) LDR pc,=__my_low_level_init branch (jump) or load PC

ThreadX Initialization(1/2) Note: any code after tx_kernel_enter will never be executed

ThreadX Initialization(2/2) tx_kernel_enter _tx_initialize_low_level tx_application_define _tx_thread_schedule

Thread Scheduling Recovering thread context Saving thread context Solicited context Interrupt context Saving thread context _tx_thread_system_return

Solicited Context extremely small(48 bytes of stack space)

Interrupt Context

Example :ARM code fragment(1/6)

* * * * * * * *

Example :ARM code fragment(3/6) *

Example :ARM code fragment(4/6) *

Example :ARM code fragment(5/6) LDMIA sp!, {r0,r1} //r0= *sp! //r1= *(sp!+4) IA: Increment After IB: Increment Before DA: Decrement After DB: Decrement Before

Example :ARM code fragment(6/6) MSRNE SPSR_cxsf, r1 //copy r1->SPSR_cxsf NE: Not equal BX lr //branch (jump) to lr Mov pc, lr //copy lr->pc

ThreadX Interrupt Handling IRQ interrupt handling LDR pc, =__tx_irq_handler FIQ interrupt handling LDR pc, =__tx_fiq_handler

Example Of A ThreadX IRQ Handler

Example Of A ThreadX FIQ Handler

Internal Interrupt Processing Idle system Saving solicited thread contexts _tx_thread_context_save Saving interrupt thread contexts Nested interrupt handling Enable and disable nesting for IRQ interrupt handlers Enable and disable nesting for FIQ interrupt handlers

Enable And Disable Nesting For IRQ Interrupt Handlers EXPORT __tx_irq_handler EXPORT __tx_irq_processing_return __tx_irq_handler B _tx_thread_context_save __tx_irq_processing_return BL _tx_thread_irq_nesting_start BL application_irq_handler BL _tx_thread_irq_nesting_end B _tx_thread_context_restore

Enable And Disable Nesting For FIQ Interrupt Handlers EXPORT __tx_fiq_handler EXPORT __tx_fiq_processing_return __tx_fiq_handler B _tx_thread_fiq_context_save __tx_fiq_processing_return BL _tx_thread_fiq_nesting_start BL application_fiq_handler BL _tx_thread_fiq_nesting_end B _tx_thread_fiq_context_restore