GLAST LAT ProjectSIU MRR DAQ & FSWV1 1 GLAST Large Area Telescope: G. Haller SLAC (650) Gamma-ray Large Area Space Telescope SIU Manufacturing Readiness Review (MRR)

GLAST LAT ProjectSIU MRR DAQ & FSWV1 2 Contents Overview (G. Haller) –SIU Module Description –Changes since CDR –Design and Test Documentation –Engineering Module Validation Production Quality Assurance Quality Assurance Plan

GLAST LAT ProjectSIU MRR DAQ & FSWV1 3 LAT Electronics 3 Event-Processor Units (EPU) (2 + 1 spare) –Event processing CPU –LAT Communication Board –SIB Spacecraft Interface Units (SIU)* –Storage Interface Board (SIB): Spacecraft interface, control & telemetry –LAT control CPU –LAT Communication Board (LCB): LAT command and data interface 16 Tower Electronics Modules & Tower Power Supplies * Primary & Secondary Units shown in one chassis Power-Distribution Unit (PDU)* –Spacecraft interface, power –LAT power distribution –LAT health monitoring Global-Trigger/ACD-EM/Signal-Distribution Unit* TKR CAL TKR Front-End Electronics (MCM) ACD Front-End Electronics (FREE) CAL Front-End Electronics (AFEE)

GLAST LAT ProjectSIU MRR DAQ & FSWV1 4 SIU/EPU Mounted on LAT SIU PDU EPU’s

GLAST LAT ProjectSIU MRR DAQ & FSWV1 5 SIU/EPU Crate Electronics Storage Interface Board (SIB) –EEPROM –MIL1553 Communication with spacecraft* –Power Control of PDU/GASU power switches in PDU* –Power Control of VCHP switches in heater box* LAT Communication Board (LCB) –Communication with GASU Commanding Read-back Data Housekeeping Data Event Data Crate Power Supply Board (CPS) –28V to 3.3V/5V conversion –Power-On Reset –LVDS-CMOS conversion of spacecraft discretes* –System clock to GASU CPU Board (RAD750) –Processor** –IO of level-converted SC discretes Crate Backplane (CBP) –passive *Only used in SIU crate **Start-up ROM code different from EPU and SIU

GLAST LAT ProjectSIU MRR DAQ & FSWV1 6 SIU/EPU Crate Partially loaded crate on left (without LCB and SIB) Fully loaded crate on right Shown are also serial card and ethernet cards, not part of flight assembly (cards with front-panel connections)

GLAST LAT ProjectSIU MRR DAQ & FSWV1 7 CBP & CPS & CPU CPS (Crate Power Supply Board) CBP (Crate Backplane) CPU (RAD750 from BAE)

GLAST LAT ProjectSIU MRR DAQ & FSWV1 8 SIB & LCB SIB (Storage Interface Board) LCB (LAT Communication Board)

GLAST LAT ProjectSIU MRR DAQ & FSWV1 9 Changes since CDR SIB/LCB –Code in FPGA was finished/modified and bugs fixed –Some resistor values were changed to optimize performance CPS –Some resistor/capacitor values were changed to optimize performance Backplane –Some interconnections were added between modules and connector IO

GLAST LAT ProjectSIU MRR DAQ & FSWV1 10 Power Peer Review RFA Status RFA 3 –Request Need to get AR-461 filter schematic plus schematic of supply on spacecraft. Need to develop model of power and ground distribution to verifiy filter performance relative to 100 kHz noise. Damping of the entire filter network should also be verified to assure that an interactive among the many identical filters cannot occur. –Response (SLAC) The PRU Road Show exercised the Spacecraft PRU and the LAT interface and tested the performance. The results are: –(1) The interface between the Spacecraft and LAT is understood (pinouts and signal definitions). –(2) The SIU, VCHP and DAQ feeds are stable under full load. –(3) The conducted EMI is within the requirement. –(4) The Calorimeter - Tracker mini-tower performs properly with the spacecraft PRU. –(5) There were no significant transients when the LAT feed is turned off when fully powered. The test results are documented in LAT-AM

GLAST LAT ProjectSIU MRR DAQ & FSWV1 11 Power Peer Review RFA Status (Continued) RFA 4 –Request T0-220 Maxim regulators have their mounting tabs connected to ground. This has the potential of creating an undesirable ground path with associated noise problems. The optimum grounding solution for this particular configuration is to connect all elements to chassis and use the structure as the primary ground return (as diagrammed on the conference room whiteboard). It is strongly recommended that this approach be taken to assure proper instrument performance despite the fact that the approach is slightly unorthodox. As a second issue, it is also suggested that gold foil or indium foil be used to assure reproducible heat sink contact for the regulators. The grease or no intermediate material approaches are strongly recommended against. –Response (SLAC) 1) The grounding approach defined in the RFA is the current implementation. The grounding tabs on the Maxim regulators are mounted directly to the enclosure, and the enclosure used as the primary ground return (2) The regulators are mounted using a thermally conductive adhesive (CV Nusil). Tests on the EM hardware showed minimal temperature rise (a few degrees) across the interface.

GLAST LAT ProjectSIU MRR DAQ & FSWV1 12 Power Peer Review RFA Status (Continued) RFA 5 –Request Maxim part screening must be carefully done to assure that the testing provides valid verification reliability. Documented methods by Maxim are for static burn-in only (diffusion based issues) and do not represent the actual operational case planned for GLAST. In that the GLAST application is actually fairly stressful AND uses the part outside of its normal operational range (for the 1.5 volt output case), it is suggested that the screening and qual test be configured to verify the 1.5 volt configuration since it is most stressful. Note that great care must be taken with the layout and instrumentation to assure that the setup does not accidentally result in part damage. –Response (NASA/SLAC) Parts were screened and qualification testing performed at GSFC.

GLAST LAT ProjectSIU MRR DAQ & FSWV1 13 Power Peer Review RFA Status (Continued) RFA 6 –Request The 28 volt converter planned for use by Spectrum Astro, uses a step-up transformer. A quick calculation indicates that the step-up ratio is probably 1.5 or more. therefore, a failure where the control loop goes open while the bus is at 33 volts, could put as much as 50 volts on the input to the power supply regulators. Such a condition could have catastrophic consequences to the instrument such that system level redundancy could be compromised due to progagation of the failure across interfaces. Therefore, it is strongly recommended that overvoltage protection be implemented to assure protection of the hardware plus protection against failure propagation. –Response (NASA) Lambda identified a credible single point failure that could cause an overvoltage condition. Spectrum added a transorb across the output of each 28 volt feed to prevent the voltage from exceeding 38 V. A test was run at Lambda at the end of August to verify the design. The preliminary results show that the voltage never exceeded 38 V. Spectrum Astro is reviewing the test results and performing additional studies to ensure the test results are analytically consistent with the circuitry.

GLAST LAT ProjectSIU MRR DAQ & FSWV1 14 ELX Peer Review RFA Status RFA 23 –Request In order to understand EMI, perform SPICE analysis of the LAT internal power distribution bus. Include models for S/C DC/DC converters, all filters, and LAT DC/DC converters. Use model to establish EMI self-compatibility, i.e. will the internal EMI sources cause problems. Look at inrush issues as well –Response We are not able to perform SPICE level simulations due to the lack of SPICE models for the converter hybrids. However no issues were found in tests performed (PRU road-show and test-bed). EMI will be tested on the qualification models.

GLAST LAT ProjectSIU MRR DAQ & FSWV1 15 ELX Peer Review RFA Status (Continued) RFA 24 –Request For the CDR, revise the grounding scheme chart to make it more clear and accurate. –Response –Was done for CDR

GLAST LAT ProjectSIU MRR DAQ & FSWV1 16 SIU/EPU Documents (all released) SIB –LAT-DS Circuit Card Assembly SIU-SIB –LAT-DS PWB, Fab, Loading, and Assembly-SIU-SIB –LAT-TD Excel Bill of Materials SIU-SIB –LAT-DS Printed-Wiring Board SIB –LAT-DS u-Front-Panel –LAT-DS Heat-Sink Stiffener –LAT-DS Storage Interface Board Schematic LCB –LAT-DS Circuit Card Assembly –LAT-DS Printed-Wiring Board LCB –LAT-DS PWB, Fab, Loading, and Assembly –LAT-TD Bill of Materials –LAT-DS u-Front-Panel –LAT-DS Heat-Sink Stiffener –LAT-DS LCB Schematic CPS –LAT-DS Circuit Card Assembly –LAT-DS Printed-Wiring Board CPS –LAT-DS PWB, Fab, Loading, and Assembly –LAT-TD Bill of Materials –LAT-DS u-Front-Panel –LAT-DS Heat-Sink –LAT-DS Crate Power Supply Schematic CBP –LAT-DS Circuit Card Assembly –LAT-DS Printed-Wiring Board CPB –LAT-DS PWB, Fab, Loading, and Assembly –LAT-TD Bill of Materials in excel –LAT-DS Assembly: CBP, cable and connector plate –LAT-DS Connector Plate, SIU/EPU Chassis SIU/EPU Assembly –LAT-DS SIU/EPU Assembly

GLAST LAT ProjectSIU MRR DAQ & FSWV1 17 Engineering Model Design Validation –Tested on bench and on test-bed Functionality and performance validated on test-bed 16 TEM/TPS, EM PDU and GASU connected to SIU & EPU’s –Validated over frequency and voltage margins –Limitations Only limited temperature tests performed on SIU

GLAST LAT ProjectSIU MRR DAQ & FSWV1 18 Parts, Materials, and Processes All EEE Parts approved by the Program Parts Board Materials –All Materials have been approved by the Program MPRB in accordance with LAT-SS-00107, LAT Mechanical Parts Plan GLAST/LAT Material Usage Agreement #002 (MAR DID No. 313; LAT Document # LAT-TD )- Approved 9/13/04 Processes –All processes have been reviewed and approved by the Program MPRB in accordance with LAT-SS , LAT Mechanical Parts Plan

GLAST LAT ProjectSIU MRR DAQ & FSWV1 19 Procurement Status All parts were procured and received FPGA’s were programmed Contract for assembly was awarded Manufacturing Process Flow at assembler, Configuration Management, identical to what was presented for the PDU & GASU, see –

GLAST LAT ProjectSIU MRR DAQ & FSWV1 20 Quality Assurance Same vendor and processes as used for PDu and GASU modules See QA presentation at –