CS 140 Lecture 9 Professor CK Cheng 4/30/02
Part II. Sequential Network 1.Memory 2.Specification 3.Implementation S XY s i t+1 = g i (S t, x t )
Given a sequential machine that recognizes patterns 110 or 101, draw the state diagram. Overlap is allowed init 1/0 0/0 s0s0 s1s1 s2s2 10 s2s2 1/0 0/0 1/1 0/1 1/0 s0s1s2s3s0s1s2s3 PS X 0 1 s 0 / 0 s 1 / 0 s 2 / 0 s 3 / 0 s 0 / 0 s 1 / 1 s 2 / 1 s 3 / 0 State table PS inputs X=0 X=1 00, 0 10, 0 10, 0 00, 0 11, 1 10, 1 11, 0 Q 1 (t) Q 0 (t) Q 1 (t+1) Q 0 (t+1 Input Output State Assignment s 0 :00 s 1 :01 s 2 :10 s 3 :11
Given a sequential machine that outputs a “1” when input contains an odd # of 0s, and even # of 1s, draw the state diagram. Input Output s 0 : even # of 1s, even # of 0s s 1 : even # of 1s, odd # of 0s s 2 : odd # of 1s, even # of 0s s 3 : odd # of 1s, odd # of 1s s 1 / 1 s 2 / 0 s 3 / 0 s 0 /
s0s1s2s3s0s1s2s3 PS X 0 1 s 1 / 1 s 2 / 0 s 0 / 0 s 3 / 0 s 3 / 0 s 0 / 0 s 2 / 0 s 1 / 1 Moore Machine Mealy Machine s0s1s2s3s0s1s2s3 PS X 0 1 s 1 s 2 s s 3 s 3 s 0 s 2 s 1 y Moore Machine: y(t) = f(x(t), s(t)) Mealy Machine:y(t) = f(s(t)) s(t+1) = g(x(t), s(t))
Canonical Form Combinational Logic x(t) y(t) CLK C2 C1 y(t) CLK x(t) C1C2 CLK x(t) y(t)
(1)State Table: y(t) = f(Q(t), x(t)) Q(t+1) = y(Q(t) x(t)) (2)Excitation Table: (1)D(t) = e D (Q(t+1), Q(t)); (2)T(t) = e T (Q(t+1), Q(t)); (3)S, R, J, K (3)From 1 & 2, we derive (1)D(t) = h D (Q(t), x(t)); (2)T = h T (Q(t), x(t)); (3)S,R,J,K. (4)Use K-Map (QuineMcClusky) to derive optional combinational logic implementation. (1)D(t) = h(Q(t), x(t)) (2)Y(t) = f(Q(t), x(t))
Given a state table, implement with 2 D F-Fs x=0 x=1 01, 0 00, 0 10, 1 01, 1 00, 1 10, 0 Q 1 (t) Q 0 (t) Q 1 (t+1) Q 1 (t) id Q 1 (t) Q 0 (t) x(t) D 1 (t) D 0 (t) y(t) Excitation Table D(t)
y Q1Q Q0Q0 D1:D1: y Q1Q Q0Q0 D2:D2: y Q1Q Q0Q0 y:
x D Q Q’ D Q y Q0Q0 D0D0 D1D1 y(t) = Q 0 (t) + Q 1 (t) x’ D 0 (t) = Q 0 (t) x + Q 1 (t)’ Q 0 (t)’ D 1 (t) = Q 0 (t) x’ + Q 1 (t) x Q1Q1 Q0Q0 Q0Q0 Q0’Q0’ Q1’Q1’