Liron Cohen

2 Introduction SVF was jointly developed by Texas Instruments and Teradyne in response to a need for the exchange of Boundary Scan test vectors between such tools as test generation software and ATE (Automatic Test Equipment). SVF was jointly developed by Texas Instruments and Teradyne in response to a need for the exchange of Boundary Scan test vectors between such tools as test generation software and ATE (Automatic Test Equipment). At 1991, usage of the IEEE standard was increasing but no common format or language existed to satisfy the need for a common data exchange. At 1991, usage of the IEEE standard was increasing but no common format or language existed to satisfy the need for a common data exchange.

Liron Cohen Introduction The developers of SVF chose a format that did not use test vectors solely to provide TCK (clock) and TMS (Test Mode Select) signals to the TAP (Test Access Port). The developers of SVF chose a format that did not use test vectors solely to provide TCK (clock) and TMS (Test Mode Select) signals to the TAP (Test Access Port). Instead, the SVF format assume that all operations begin and end in stable states. This results in a much simpler and more concise description of the stimulus vectors. Instead, the SVF format assume that all operations begin and end in stable states. This results in a much simpler and more concise description of the stimulus vectors.

Liron Cohen Introduction Reminder : Reminder : Boundary-scan test execution is controlled by the sequencing of TAP signals on the pins of the devices. Each device's behavior is determined solely by the states of its TAP pins. Boundary- scan tools must maintain knowledge of the sequences required to exert certain behaviors within a device and where that device is located down the serial scan path.

Liron Cohen Introduction TAP Controller TAP Controller State Diagram:

Liron Cohen Introduction On the other hand, SVF controls the IEEE Std test bus using commands that transition the TAP from one steady state to another. On the other hand, SVF controls the IEEE Std test bus using commands that transition the TAP from one steady state to another. Rather than describe the explicit state of the IEEE Standard bus on every TCK cycle, SVF describes it in terms of transactions conducted between stable states. Rather than describe the explicit state of the IEEE Standard bus on every TCK cycle, SVF describes it in terms of transactions conducted between stable states.

Liron Cohen Introduction The Capture,Update, Pause, etc. states are inferred rather than explicitly represented. The data to be scanned in, expected data out, and compare mask are all grouped in an easily understandable manner. The Capture,Update, Pause, etc. states are inferred rather than explicitly represented. The data to be scanned in, expected data out, and compare mask are all grouped in an easily understandable manner. A command is provided to support deterministic navigation of TAP states where required. A command is provided to support deterministic navigation of TAP states where required. (Note - further discussion on the next slides under State Commands). (Note - further discussion on the next slides under State Commands).

Liron Cohen Introduction In addition to supporting higher level of scan operations, SVF also supports combined serial and parallel operations. In addition to supporting higher level of scan operations, SVF also supports combined serial and parallel operations. This allows SVF to accommodate environments where some stimulus/response is handled via parallel I/O, and serial signals are accessed via an IEEE Std control environment. This allows SVF to accommodate environments where some stimulus/response is handled via parallel I/O, and serial signals are accessed via an IEEE Std control environment. (Note - further discussion on the next slides under Parallel Commands). (Note - further discussion on the next slides under Parallel Commands).

Liron Cohen Introduction SVF also supports the concept of scan offsets. Offsets allow a test to be applied to a component or cluster of logic embedded in the middle of a scan path. SVF also supports the concept of scan offsets. Offsets allow a test to be applied to a component or cluster of logic embedded in the middle of a scan path. SVF allows a header and trailer to be defined once, which maintains the instruction register and data registers of the non-targeted devices in the desired BYPASS state. If the same test were targeted toward another device, this would be accommodated just by changing the headers and trailers. SVF allows a header and trailer to be defined once, which maintains the instruction register and data registers of the non-targeted devices in the desired BYPASS state. If the same test were targeted toward another device, this would be accommodated just by changing the headers and trailers. (Note - further discussion on the next slides under Offset Commands). (Note - further discussion on the next slides under Offset Commands).

Liron Cohen Introduction Thus, with the goal of creating a format that was independent of the vendor, software or equipment SVF was developed and now used as the media for exchanging descriptions of high- level IEEE bus operations. Thus, with the goal of creating a format that was independent of the vendor, software or equipment SVF was developed and now used as the media for exchanging descriptions of high- level IEEE bus operations. Ready to go deeper ?

Liron Cohen Agenda Topics to be covered : Topics to be covered : – SVF Structure. – SVF Commands. – Case Study. – Cons & Pros.

Liron Cohen SVF Structure The SVF file is defined as an ASCII file that consists of a set of SVF statements. The SVF file is defined as an ASCII file that consists of a set of SVF statements. Statements are terminated by a semicolon (;) and may continue for more than one line. Statements are terminated by a semicolon (;) and may continue for more than one line. The maximum number of ASCII characters per line is 256. The maximum number of ASCII characters per line is 256. SVF is not case sensitive. SVF is not case sensitive.

Liron Cohen SVF Structure Comments can be inserted into an SVF file after an exclamation point (!) or a pair of slashes (//). Comments can be inserted into an SVF file after an exclamation point (!) or a pair of slashes (//). Scan data within a statement is expressed as hexadecimal and is always enclosed in parentheses. Scan data within a statement is expressed as hexadecimal and is always enclosed in parentheses. Each statement consists of a command and parameters associated with that specific command. Commands can be grouped into three types: state commands, offset commands, and parallel commands. Each statement consists of a command and parameters associated with that specific command. Commands can be grouped into three types: state commands, offset commands, and parallel commands.

Liron Cohen SVF Structure State commands are used to specify how the test sequences will traverse the IEEE Std TAP state machine. State commands are used to specify how the test sequences will traverse the IEEE Std TAP state machine. Offset commands allow a series of SVF commands to be targeted toward a contiguous series of points in the scan path. Offset commands allow a series of SVF commands to be targeted toward a contiguous series of points in the scan path. Parallel commands allow SVF to combine serial and parallel sequences. Parallel commands allow SVF to combine serial and parallel sequences.

Liron Cohen SVF Structure The following table lists each SVF state name used for each IEEE TAP state name :

Liron Cohen SVF Commands State Commands : State Commands : –SDR : (Scan Data Register) performs an IEEE Std data register scan. –SIR : (Scan Instruction Register) performs an IEEE Std instruction register scan. –ENDDR : establish a default state for the bus following any Data Register scan. –ENDIR : establish a default state for the bus following any Instruction Register scan.

Liron Cohen SVF Commands –RUNTEST : Forces the IEEE bus to a run state for a specified number of clocks or a specified time period. –STATE : Forces the IEEE bus to a specified stable state. –TRST : activates or deactivates the optional Test-ReSeT signal of the IEEE Std bus. Note : Note : For each of the above commands except STATE & TRST, a default path through the state machine is used (observe the figure on the next slide). Each of these commands also terminates in a stable state.

Liron Cohen

Liron Cohen SVF Commands Offset Commands : Offset Commands : –HDR : (Header Data Register) specifies a particular pattern of data bits to be padded onto the front (Header) of every Data Register scan. –HIR : (Header Instruction Register) specifies a particular pattern of data bits to be padded onto the front (Header) of every Instruction Register scan. –TDR : (Trailer Data Register) specify data to be injected on the back (Trailer) of each Data Register scan. –TIR : (Trailer Instruction Register) specify data to be injected on the back (Trailer) of each Instruction Register scan.

Liron Cohen SVF Commands Example of a device with multiple instances - Example of a device with multiple instances - Note – These patterns need only be specified once and are included on each scan unless changed by a subsequent HDR, HIR,TDR, or TIR command. Note – These patterns need only be specified once and are included on each scan unless changed by a subsequent HDR, HIR,TDR, or TIR command.

Liron Cohen SVF Commands Parallel Commands : Parallel Commands : –PIO : (Parallel Input Output) Specifies a parallel test pattern. –PIOMAP : (Parallel Input Output Map) Maps PIO column positions to a logical pin.

Liron Cohen Reminder of BIST BIST : (Built-In Self Test). BIST : (Built-In Self Test). Logic included within a design that can apply test signals and compare results to determine if the design is working correctly. BIST usually consists of special circuitry built as part of an IC’s internal design. RUNBIST instruction places the IC in a self-test mode, enables a comprehensive self-test of the IC’s core logic. RUNBIST instruction places the IC in a self-test mode, enables a comprehensive self-test of the IC’s core logic.

Liron Cohen Case Study Let ’ s assume we want to test some unit which sits in the middle of some device. Let ’ s assume we want to test some unit which sits in the middle of some device. Be more specific lets say that the wanted unit has three units before it in the scan path and two units after it in the scan path. Be more specific lets say that the wanted unit has three units before it in the scan path and two units after it in the scan path. For simplicity we will also assume this unit supports BIST, which initialized by scanning 41 (hex) into the IR and ABCD (hex) into the DR. For simplicity we will also assume this unit supports BIST, which initialized by scanning 41 (hex) into the IR and ABCD (hex) into the DR. Finally, we assume that the BIST in the wanted unit is executed by entering the Run-Test/Idle state for 95 clock cycles.

Liron Cohen Case Study At the end we will check all the BIST result and compare all its bits against a deterministic value (1234 (hex) ) to determine pass/fail. At the end we will check all the BIST result and compare all its bits against a deterministic value (1234 (hex) ) to determine pass/fail. On the next slide we will look into the SVF file of this case. On the next slide we will look into the SVF file of this case.

Liron Cohen Case Study ! Begin Test Program ! Disable Test Reset line TRST OFF; ! Initialize UUT STATE RESET; ! End IR scans in DRPAUSE ENDIR DRPAUSE; ! End DR scans in DRPAUSE ENDDR DRPAUSE; ! 24 bit IR header HIR 24 TDI (FFFFFF); ! 3 bit DR header HDR 3 TDI (7); ! 16 bit IR trailer TIR 16 TDI (FFFF); ! 2 bit DR trailer TDR 2 TDI (3); ! 8 bit IR scan, load BIST opcode SIR 8 TDI (41) TDO (81) MASK (FF); ! 16 bit DR scan, load BIST seed SDR 16 TDI (ABCD); ! RUNBIST for 95 TCK Clocks RUNTEST 95 TCK ENDSTATE IRPAUSE; ! 16 bit DR scan, check BIST status SDR 16 TDI (0000) TDO(1234) MASK(FFFF); ! Enter Test-Logic-Reset STATE RESET; ! End Test Program

Liron Cohen Cons and Pros Advantages : Advantages : As we have seen, it is pretty simple to write a test with SVF file. This in turn reduces time (and money…). Disadvantages : Disadvantages : Because it’s simplicity, SVF only provides PASS/FAIL results, meaning no diagnostics.

Liron Cohen Cons and Pros Possible solution : Possible solution : First, run all tests in SVF mode. Only on the parts that failed run a C++ version to obtain diagnostic data. (Note – A C++ test routine is developed to automates the execution steps. The program scans the instruction into the instruction register, clocks the processor, etc. As each instruction is executed, the program dumps the status registers to allow monitoring of each instruction.)

Liron Cohen Summary With SVF it is much easier to develop test patterns that are transportable across a wide selection of simulation software and test equipment - from design verification through field diagnostics. With SVF it is much easier to develop test patterns that are transportable across a wide selection of simulation software and test equipment - from design verification through field diagnostics. SVF is a useful and reliable format for exchanging data between the Boundary Scan TAP and the software that drives it. SVF is a useful and reliable format for exchanging data between the Boundary Scan TAP and the software that drives it.

Liron Cohen Where to Get More Information Course lecture 10 Course lecture r/docs/misc/bsdlformat.html r/docs/misc/bsdlformat.html r/docs/misc/bsdlformat.html r/docs/misc/bsdlformat.html

Liron Cohen בהצלחה להפועל ירושלים היום בגמר הפלייאוף !!!