Senior Project BY: Ricardo V. Gonzalez Advisor: Dr. Vinod B. Prasad

Data Mover Using Vlsi In L-Edit Testing in different CAD for functionality assurance

Objective zThe main objective is to acquire experience in asic design building a data mover with testable features to transfer data from the input to the output following a geometric algorithm. This type of design will require the use of CMOS technology and logic gate design to be fabricated into a chip

Table Of Content zBlock diagram zDesign equations zTwo bit example of a data mover zTiming control needed zTiming chart zComplete data mover (2 bit example) zDesigns of circuitry finished

Table Of Content (Continued) zUpdated progress zWork left to do zQuestion section

Block Diagram

Design Equations zData mover: zMemory a[2]; b[2]; c[2]. Inputs: x[2] zOutputs: z[2] z1 a x z2 c /a z3 b c[0], c[1] z4 c a v b z5 z = c

Two Bit Example

Timing Control Needed

Controller Circuit (Tested In Logicworks)

Controller Simulated In Logicworks

Control Circuit Designed In L-Edit

Controller Simulation In Pspice

D flip-flop designed in L-Edit

D flip-flop simulation in Pspice

And gate in L-Edit

And Gate simulation in Pspice

X Or Gate in L-Edit

Complete Data Mover (Two Bit Example)

Data Mover 2 Bit in L-Edit

Data Mover 4 Bit In L-edit

4 Bit Data Mover Simulation In Pspice

Work Done So Far zResearched about the behavior of data mover circuit zDesigned controller circuit for timing zTested all gates and circuits zImplemented all circuits in L-EDIT

Work Left To Do zMake final connections from the design to the pad zResearch about more possible applications of this design zDesign a feasible application zSend design for fabrication zPrepare for expo 2001

Question Section zAny questions or comments?