1 CS 201 Compiler Construction Lecture 12 Global Register Allocation

Global  Across basic block boundaries Approach: Model register allocation as a graph coloring problem. Graph Coloring: Given an undirected graph G, a coloring of G is an assignment of colors to nodes such that any two nodes connected by an edge have different colors. In general, graph coloring is NP- complete. 2 4-coloring of a graph

Register Allocation Contd.. Register Allocation as a graph coloring problem: Nodes  Variables Edges  Interferences among variables If two variables are simultaneously live at a program point, they interfere. Thus, they must be assigned different registers. 3

Live Ranges Nodes can be live ranges of variables instead of variables. Live Range: A minimal subset of definitions and uses of a variable such that: no other uses of the same variable can use definitions from the minimal subset; and no uses of the variable in the minimal subset can use values from definitions of the variable that are not part of the minimal subset. 4

Live Ranges Contd.. 5

Global Register Allocation 1.Perform global analysis, identify live ranges, & compute interferences. 2.Build register interference graph. 3.Coalesce nodes in the graph. 4.Attempt n-coloring of the graph. 5.If none found, then modify program & interference graph by introducing “spill code” and repeat the above process till n- coloring is obtained. 6

Node Coalescing Combine X & Y into a single node: X & Y will be assigned the same register X=Y is effectively eliminated. 7

Node Coalescing Contd.. Coalescing combines smaller live ranges into bigger ones in order to eliminate copy assignments. 8

Attempt n-coloring Color the interference graph using R colors where R is the number of registers. Observation: If there is a node n with < R neighbors, then no matter how the neighbors are colored, there will be at least one color left over to color node n. Remove n and its edges to get G’ Repeat the above process to get G’’ ……. If an empty graph results, R-coloring is possible. Assign colors in reverse of the order in which they were removed. 9

Attempt Coloring Contd.. Input: Graph G Output: N-coloring of G While there exists n in G with < N edges do Eliminate n & all its edges from G; list n End while If G is empty the for each node i in list in reverse order do Add i & its edges back to G; choose color for i endfor End if 10

Example 11 Empty graph

Example Contd.. 12

Spill if needed What if G is not empty ? Must introduce spill code (loads and stores) Remove a node from G and spill its value into memory. The resulting graph will have fewer edges and therefore we may be able to continue removing nodes according to degree < N condition. Which node to spill? Low spill cost (extra instructions) High degree (more likely nodes with degree < N will result) 13

CISC vs RISC Processor CISC: spilled data is directly referenced from memory. RISC: spilled data must be loaded before use, i.e. register is needed for a short duration. A=B+CLoad C, R2 C spilledR0 = R1 + R2 A – R0, B – R1 14 Live range of C

Revised Algorithm 1.Remove nodes with degree < N iteratively as long as this process can continue. 2.If the graph is not empty then spill a node and go back to step 1. 3.If nodes were spilled then –Insert spill code for all spill decisions –Rebuild interference graph –Go back to step 1 4.Assign colors in reverse order. 15

Enhancements 1.Attempt coloring of spilled nodes –When coloring nodes in reverse order, see if a color is available for a spilled node. Why? The graph may be colorable and this simple heuristic may work. 2.Live Range Splitting –One live range can be split into two such that different registers are available for coloring each result live range. At transition point from one range to another, Register-to-Register transfer instruction is required. 16

Colorability Interference Graphs for straightline code are interval graphs  coloring is not NP- complete for them registers are needed

Colorability Contd.. Arbitrary interference graphs cannot be created from straightline code. 18 Cannot create live range D that does not interfere with C but does interfere with A and B Can if control flow is allowed

Many Other Issues 1.Different register types 2.Overlapping registers of different sizes 3.Instruction may require a register pair 4.Allocating register to array elements (as opposed to scalars) 5.……. 19

Many Other Issues 1.Different register types 2.Overlapping registers of different sizes 3.Instruction may require a register pair 4.Allocating register to array elements (as opposed to scalars) 5.……. 20

Sample Problems 21