6-BIT THERMOMETER CODER SIDDHARTH VERMA SAURABH PURI KAPIL SETHI TAE-YOON PARK ADVISOR: Dr. DAVID PARENT DATE:8th May,2006

OUTLINE INTRODUCTION Theory of Thermometer Coder.. Why we use Thermometer Coder..?? SPECIFICATONS DESIGNING RESULTS CONCLUSION

INTRODUCTION WHY THERMOMETER CODER? High Conversion Speed Main block in Digital to Analog Converter. Converts the binary weighted digital input bits into a thermometer coded outputs. Applications WHY THERMOMETER CODER? High Conversion Speed Very Good Dynamic Performance Logic Minimization

Specifications: Power Consumption=0.49mW Area=1120*500 Input clock at 200 MHz Outputs to derive 20 fF each Technology- “AMIO6”

NC Verilog Simulation

NC VERILOG SIMULATION (Cont..)

Longest Path Calculation

6 Bit Thermometer Decoder Layout

Verification

Thermometer Coder Extracted View

WAVEFORMS

OUTPUT WAVEFORMS

COST ANALYSIS Time spent on each phase of the project: Verifying logic 3 Weeks Schematic sizing 1 Week Verifying Timing 1 Week Layout 5 Weeks Post Extracted Timing 3 Days

Lessons learned Start working early on the project. Working in a team. Careful while doing the layout part. More you enjoy working on the project the more you will learn.

CONCLUSION The 6-bit thermometer coder works at 200Mhz clock frequency The project drives 63 outputs with each driving a 20fF load capacitance Meets all timing specifications

Acknowledgements Thanks to Prof. David Parent for his support & guidance. Thanks to Cadence Design Systems for providing us wonderful labs.