IEEE International Symposium on Distributed Simulation and Real-Time Applications October 27, 2008 Vancouver, British Columbia, Canada Presented by An Automated Mapping of Timed Functional Specification to A Precision Timed Architecture Shanna-Shaye Forbes*, Hugo A. Andrade**, Hiren D. Patel* and Edward A. Lee* Shanna-Shaye Forbes *University of California, Berkeley *National Instruments Corporation

Overview Forbes, Oct. 27, Programming languages generally abstract away the notion of timing at the software level. We overcome this shortcoming by combining an architecture which has repeatable timing with a model based programming model with temporal semantics.

PRET:Precision Timed Machines ISA extensions with timing instructions Multithreaded architecture with scratchpad memories and time-triggered access to main memory Simulator accepts programs in C with additional timing instructions. JOP(Vienna), SPEAR(Vienna), KEP(Kiel), REMIC (Auckland) 3 Forbes, Oct. 27, 2008 Related Work

LabVIEW Actor oriented structured data flow programming language G C software synthesis backend to automatically generate code Has the ability to incorporate legacy C code into a model based design Forbes, Oct. 27, 20084

LabVIEW cont. Timed loops allow the user to specify the period and offset at which functions are to be executed IEEE DS-RT, Oct. 27, 2008 An Automated Mapping of Timed Functional Specification to A Precision Timed Architecture, Forbes 5

Timed Loop 6 Forbes, Oct. 27, 2008

Plug-in LabVIEW has a plug-in architecture. We implemented a plug-in that maps LabVIEW to the PRET architecture. Implements timed loops with the PRET timing instruction. 7Forbes, Oct. 27, 2008

Simple mutual exclusion example 8Forbes, Oct. 27, 2008 Producer Observer Consumer

Questions? 9Forbes, Oct. 27, 2008

Demo 10Forbes, Oct. 27, 2008