Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved. Slide 1 The Digital.

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Presentation transcript:

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 1 The Digital Logic Level (4) Ass. Prof. Dr. Masri Ayob TK2123 : Lecture 16

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 2 Encoders: Decimal-to-BCD Encoder

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 3 Encoders 8-line-to-3-line encoder8-line-to-3-line encoder

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 4 Code Converters : BCD-to-binary conversion

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 5 Multiplexers (Data Selectors) 4-input multiplexer4-input multiplexer

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 6 Multiplexers (Data Selectors) Expanded multiplexersExpanded multiplexers

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 7 Demultiplexers 2-line-to-4-line demux2-line-to-4-line demux

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 8 Clocks (a) A clock. (b) The timing diagram for the clock. (c) Generation of an asymmetric clock.

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 9 Latches (3) A clocked D latch.

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 10 Flip-Flops (1) (a) A pulse generator. (b) Timing at four points in the circuit.

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 11 D flip-flop

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 12 Flip-Flops (3) D latches and flip-flops.

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 13 Flip-Flops (4) Dual D flip-flop.

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 14 Memory Organization (1) Logic diagram for a 4 x 3 memory. Each row is one of the four 3- bit words.

Floyd Digital Fundamentals, 9/e Copyright ©2006 by Pearson Education, Inc. Upper Saddle River, New Jersey All rights reserved. Slide 15 Thank you Q&A

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