Design of RF CMOS Low Noise Amplifiers Using a Current Based MOSFET Model Virgínia Helena Varotto Baroncini Oscar da Costa Gouveia Filho.

Slides:

Advertisements

Similar presentations

Goals Investigate circuits that bias transistors into different operating regions. Two Supplies Biasing Four Resistor Biasing Two Resistor Biasing Biasing.

Advertisements

Importance of the LNA. Importance of the LNA Importance of the LNA Friis’ Formula.

Transistors (MOSFETs)

Physical structure of a n-channel device:

DIFFERENTIAL AMPLIFIERS. DIFFERENTIAL AMPLIFIER 1.VERY HIGH INPUT IMPEDENCE 2.VERY HIGH BANDWIDTH 3.DIFFERENTIAL INPUT 4.DC DIFFERENTIAL INPUT ACCEPTED.

Lecture 21 REMINDERS OUTLINE Frequency Response Reading: Chapter 11

Lecture 20 ANNOUNCEMENTS OUTLINE Review of MOSFET Amplifiers

University of Toronto ECE530 Analog Electronics Review of MOSFET Device Modeling Lecture 2 # 1 Review of MOSFET Device Modeling.

Cascode Stage. OUTLINE Review of BJT Amplifiers Cascode Stage Reading: Chapter 9.1.

Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 17 Lecture 17: Common Source/Gate/Drain Amplifiers Prof. Niknejad.

SINGLE-STAGE AMPLIFIERS

CURRENT MIRROR/SOURCE EMT451/4. DEFINITION Circuit that sources/sinks a constant current as biasing elements as load devices for amplifier stages.

Differential Amplifiers

Differential and Multistage Amplifiers

Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 22 Lecture 22: Multistage Amps Prof. Niknejad.

Fig. 5.1 Physical structure of the enhancement-type NMOS transistor: (a) perspective view; (b) cross section. Typically L = 1 to 10 m, W = 2 to 500.

Chap. 5 Field-effect transistors (FET) Importance for LSI/VLSI –Low fabrication cost –Small size –Low power consumption Applications –Microprocessors –Memories.

Basic Analog Design Giovanni Anelli 15 March 2005 Part I

Microelectronic circuits by Meiling CHEN 1 Lecture 13 MOSFET Differential Amplifiers.

Chapter 5 Differential and Multistage Amplifier

Spring 2007EE130 Lecture 38, Slide 1 Lecture #38 OUTLINE The MOSFET: Bulk-charge theory Body effect parameter Channel length modulation parameter PMOSFET.

Single-Stage Integrated- Circuit Amplifiers

Electronics Principles & Applications Sixth Edition Chapter 7 More About Small-Signal Amplifiers (student version) ©2003 Glencoe/McGraw-Hill Charles A.

Chapter 16 CMOS Amplifiers

Low-Noise Amplifier.

Low Noise Amplifier. DSB/SC-AM Modulation (Review)

ANALOGUE ELECTRONICS I

Transistors (MOSFETs)

Semiconductor Devices III Physics 355. Transistors in CPUs Moore’s Law (1965): the number of components in an integrated circuit will double every year;

A.1 Large Signal Operation-Transfer Charact.

CMOS Analog Design Using All-Region MOSFET Modeling 1 Chapter 1 Introduction to analog CMOS design.

Part B-3 AMPLIFIERS: Small signal low frequency transistor amplifier circuits: h-parameter representation of a transistor, Analysis of single stage transistor.

McGraw-Hill © 2008 The McGraw-Hill Companies Inc. All rights reserved. Electronics Principles & Applications Seventh Edition Chapter 7 More About Small-Signal.

Design of LNA at 2.4 GHz Using 0.25 µm Technology

Differential Amplifiers.  What is a Differential Amplifier ? Some Definitions and Symbols  Differential-mode input voltage, v ID, is the voltage difference.

Chapter #8: Differential and Multistage Amplifiers

ECE 340 ELECTRONICS I MOS APPLICATIONS AND BIASING.

Microelectronic Circuits, Sixth Edition Sedra/Smith Copyright © 2010 by Oxford University Press, Inc. C H A P T E R 9 Frequency Response.

Electronic Devices Eighth Edition Floyd Chapter 9.

18/10/20151 Calibration of Input-Matching and its Center Frequency for an Inductively Degenerated Low Noise Amplifier Laboratory of Electronics and Information.

FREQUENCY ANALYSIS Determining capacitance and resistance for pole and zero.

1 A CMOS 5-GHz Micro-Power LNA 指導教授 : 林志明教授學生 : 黃世一 Hsieh-Hung Hsieh and Liang-Hung Lu Department of Electrical Engineering and Graduate Institute of.

1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.

ECE 342 – Jose Schutt-Aine 1 ECE 242 Solid-State Devices & Circuits 15. Current Sources Jose E. Schutt-Aine Electrical & Computer Engineering University.

Device Characterization ECE/ChE 4752: Microelectronics Processing Laboratory Gary S. May April 1, 2004.

A NEW METHOD TO STABILIZE HIGH FREQUENCY HIGH GAIN CMOS LNA RF Communications Systems-on-chip Primavera 2007 Pierpaolo Passarelli.

1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 9, slide 1 Introduction to Electronic Circuit Design.

ECE 342 – Jose Schutt-Aine 1 ECE 342 Solid-State Devices & Circuits 16. Active Loads Jose E. Schutt-Aine Electrical & Computer Engineering University of.

HW (Also, use google scholar to find one or two well cited papers on symmetric models of MOSFET, and quickly study them.)

Introduction LNA Design figure of merits: operating power consumption, power gain, supply voltage level, noise figure, stability (Kf & B1f), linearity.

7-1 McGraw-Hill © 2013 The McGraw-Hill Companies, Inc. All rights reserved. Electronics Principles & Applications Eighth Edition Chapter 7 More About Small-Signal.

ANALOGUE ELECTRONICS CIRCUITS 1

© 2013 The McGraw-Hill Companies, Inc. All rights reserved. McGraw-Hill 7-1 Electronics Principles & Applications Eighth Edition Chapter 7 More About Small-Signal.

11. 9/15 2 Figure A 2 M+N -bit memory chip organized as an array of 2 M rows  2 N columns. Memory SRAM organization organized as an array of 2.

Electronic Noise Noise phenomena Device noise models

Short-channel Effects in MOS transistors

Rakshith Venkatesh 14/27/2009. What is an RF Low Noise Amplifier? The low-noise amplifier (LNA) is a special type of amplifier used in the receiver side.

1 Tai-Cheng Lee Spring 2006 MOS Field-Effect Transistors (MOS) Tai-Cheng Lee Electrical Engineering/GIEE, NTU.

Electronics Principles & Applications Fifth Edition Chapter 7 More About Small-Signal Amplifiers ©1999 Glencoe/McGraw-Hill Charles A. Schuler.

Single-Stage Integrated- Circuit Amplifiers. IC Biasing The Basic MOSFET Current Source SATURATION.

Solid-State Devices & Circuits

M. Atef, Hong Chen, and H. Zimmermann Vienna University of Technology

VI. HIGH-EFFICIENCY SWITCHMODE HYBRID AND MMIC POWER AMPLIFIERS:

ECE 333 Linear Electronics

Submitted by- RAMSHANKAR KUMAR S7,ECE, DOE,CUSAT Division of Electronics Engineering, SOE,CUSAT1.

Input Stages for Radio Systems (Low Noise Amplifiers) (LNAs)

Variable Gain CMOS LNA MOREIRA E SILVA, Paulo Marcio, DE SOUSA, Fernando Rangel Introduction Simulation.

Analysis of Single Stage Amplifiers

Presentation transcript:

Design of RF CMOS Low Noise Amplifiers Using a Current Based MOSFET Model Virgínia Helena Varotto Baroncini Oscar da Costa Gouveia Filho

OUTLINE 1. Introduction 2. MOSFET Model 3. High-Frequency Noise Model 4. LNA Analysis 5. LNA Design Example 6. Conclusion

Introduction Submicrometer CMOS technology allows the integration of RF circuits. Low voltage and low power operation → moderate inversion Model valid from weak to strong inversion

MOSFET MODEL S D B G I(V G,V S ) I(V G,V D ) I F = forward current I R = reverse current

Normalized currents where are the normalized currents andis the normalization current

Operation Regions of the MOS transistor irir ifif forward saturation i f > 100 i r reverse saturation i r > 100 i f strong weak moderate strong moderate weak triode

Small signal parameters Transconductances Capacitances

High- Frequency Noise Model S vRg S ig S id RgRg C gb C gs g ms V sb g m V gb B B S S G D

Channel Thermal Noise ifif S id (A 2 /Hz)

Induced Gate Noise

LNA Analysis LSLS LgLg LdLd V in VbVb V DD M1M1 M2M2 Cascode LNA with inductive source degeneration

Impedance Matching LgLg LsLs C gb C gs g mb V sb g ms V gs Z in Z1Z1 Z 1 can be viewed as the parallel of a resistor R with the capacitance Cgs

Simplified small signal model for the LNA matching is achieved simply by making the real part of Z in equal to the source resistance and its imaginary part equal to zero.

Noise Figure LNA small-signal model for noise calculations Definition The noise figure can be expressed as a function of i f

Noise figure versus W/L for several inversion levels at 2.5 GHz

LNA Design Example Resonance frequency2,5 GHz Supply voltage2,5 V Length 0,35  m Source resistance 50  Noise Figure< 2dB LNA Design Parameters

1. Choice of the inversion level i f =35 Procedure

2. L s for impedance matching

3. Transistor width for minimum noise figure Noise figure versus W/L for several inversion levels at 2.5 GHz

4. L g to satisfy the resonance frequency 5. L d to adjust the gain and the output resonance frequency

LNA Design Results W/LWIDID RsRs LsLs LgLg LdLd  m 4,1 mA 50  0,7 nH7,6 nH2,5 nH LsLs LgLg LdLd RSRS CLCL R Ld M1M1 M2M2 V out V in + V bias V DD

Simulation results Input impedance

Noise Figure

Conclusions  The main advantage of this methodology is that is valid in all regions of the operation of the MOS transistors;  It is possible to move the operation point of RF devices from strong inversion to moderate inversion taking advantage of higher gm/ID ratio, without degrading the noise figure;