CSC Muon Trigger September 16, 2003 CMS Annual Review 1 CSC Muon Trigger - Annual Review Jay Hauser, with many slides from Darin Acosta and Stan Durkin Personnel: u Professors l Darin Acosta (Florida), Robert Cousins (UCLA), Jay Hauser (UCLA), Paul Padley (Rice), Jaybus Roberts (Rice) u Postdocs l Sang-Joon Lee (Rice), Holger Stoeck (Florida), Slava Valouev (UCLA), Martin von der Mey (UCLA), Song Ming Wang (Florida), Yangheng Zheng (UCLA) u Students l Alexei Drozdertski (Florida), Brian Mohr (UCLA), Jason Mumford (UCLA), Greg Pawloski (Rice), Bobby Scurlock (Florida), u Engineers l JK Smith (UCLA), Alex Madorsky (Florida), Mike Matveev (Rice), Ted Nussbaum (Rice), Alex Tumanov (Rice - Software) u Collaborating engineers (PNPI) l Victor Golovtsov, Valeri Iatsioura, Lev Uvarov Outline: u Status of Boards u Test Beam 2003 Results u Experience and Plans for Production Testing u Plans for Integration and Slice Tests u Schedule and Milestones

CSC Muon Trigger September 16, 2003 CMS Annual Review 2 Current Status of CSC Trigger Elements – Quick Summary n On-chamber u Comparator ASICs for Cathodes (CFEB cards) – DONE. u ALCT Anode Trigger – almost done (~90%) n Peripheral-crate u TMB Trigger Motherboard – pre-production prototypes u MPC Muon Port Card – 2 nd generation prototype u CCB Clock & Control Board – 2 nd generation prototype n Track Finder crate in counting house u SP2002 Sector Processor – 2 nd generation prototype u CSC Muon Sorter – 1 st generation prototype u Backplane – 2 nd generation prototype

CSC Muon Trigger September 16, 2003 CMS Annual Review 3 CSC Muon Trigger Scheme CSC CFEB ALCT 1 of 24 CFEB 1 of 2 LVDB 1 of 5 Anode Front-end Board Cathode Front-end Board Anode LCT Board MPCMPC DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB CCBCCB CONTROLLERCONTROLLER Peripheral Crate on iron disk (1 of 60) Trigger Timing & Control CSC Track-Finder Crate (1) Trigger Motherboard (9) DAQ Motherboard (9) Clock Control Board Optical link In underground counting room On detector Muon Portcard (1) EMU part: on-chamber nearing end of production, peripheral crate production > ESR in Nov. ‘03 TriDAS part: Second generation prototypes Trigger Primitives 3-D Track-Finding and Measurement Sector Processor (12) Muon Sorter (1)

CSC Muon Trigger September 16, 2003 CMS Annual Review 4 On-chamber CSC Trigger Electronics n Comparator ASICs – DONE. u Compare pulse heights from adjacent strips to find position of muon to ½-strip u channel ASICS on CFEB boards (OSU) n ALCT Boards – nearly DONE. u Finds tracks among anode hits, stores data for readout u 468+spares boards of 3 types (288-, 384-, 672-channel)

CSC Muon Trigger September 16, 2003 CMS Annual Review 5 CSC Peripheral Crates in UXC55 MPCMPC DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB DMBDMB TMBTMB CCBCCB CONTROLLERCONTROLLER Clock Control Board (CCB) TRIG Motherboard (TMB) DAQ Motherboard (DMB) Crate Controller Muon Port Card (MPC)

CSC Muon Trigger September 16, 2003 CMS Annual Review 6 Trigger Motherboard n Generates Cathode LCT and matches ALCT with CLCT n Prototyped 18 TMB2001 with XCV1000E (15 for chamber testing). n 4 new TMB2003 prototypes with “production engineering” and XC2V4000. n Nov. ’03 ESR should lead into production cycle in ‘04. n 468 boards 9U x 400mm required for CSC trigger ALCT input connectors Mezzanine board CFEB Input connectors UCLA

CSC Muon Trigger September 16, 2003 CMS Annual Review 7 Clock and Control Board TTCrx Mezzanine Card ECL inputs ECL outputs Rice Mezzanine card with PLD 9U * 400 MM BOARD n Common design for both Peripheral and Track-Finder crates n 20 Boards exist n Have been distributed and used for chamber testing n 60+1 required for CMS operation

CSC Muon Trigger September 16, 2003 CMS Annual Review 8 Mezzanine card (same as TMB design) TLK2501 serializers Optomodules (1.6 Gbit/s) Muon Port Card Rice n Sorts up to 18 LCTs from 9 chambers and transmits best 3 to Track-Finder crate n 6 Boards of second generation have been fabricated and assembled. n Board has passed standalone tests, communication tests with TMB, and cosmic ray tests n Successfully read data from 2 chambers and sorted correctly n Tests with Track-Finder are continuing n Tests in time-structured test beam are underway now (for second time this year) n 60 required for CMS operation

CSC Muon Trigger September 16, 2003 CMS Annual Review 9 1 st Prototype Track-Finder Tests Sector Processor (Florida) Sector Receiver (UCLA) Clock Control Board (Rice) SBS VME Interface CustomChannelLinkBackplane(Florida) Muon Port Card (Rice) Very successful, but overall CSC latency was too long New 2002 design improves latency, reduces # of crates from 6 to 1 Results included in Trigger TDR (2000)

CSC Muon Trigger September 16, 2003 CMS Annual Review 10 CSC Track-Finder Crate SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP SR / SP CCB SBS 620 Controller Sector Receiver/ Processor Clock and Control Board Muon Sorter From MPC (chamber 4) From MPC (chamber 3) From MPC (chamber 2) From MPC (chamber 1B) From MPC (chamber 1A) To DAQ MS Single Track-Finder Crate Design with 1.6 Gbit/s optical links Custom 6U GTLP backplane for interconnections Second generation prototypes

CSC Muon Trigger September 16, 2003 CMS Annual Review 11 SP2002 (Main Board) Merged 3 SR2000s Optical Transceivers 16 x 1.6 Gbit/s Links Front FPGA TLK2501 Transceiver Phi Local LUT Eta Global LUT Phi Global LUT VME/ CCB FPGA To/from custom GTLP back- plane Data conversion: Receiver: Florida n 12 Used in CMS System

CSC Muon Trigger September 16, 2003 CMS Annual Review 12 SP Trigger Logic From SP2000 to SP2002 mezzanine card (5 manufactured) Xilinx Virtex-2 XC2V4000 ~800 user I/O Performs track-finding logic and P T assignment Florida

CSC Muon Trigger September 16, 2003 CMS Annual Review 13 GTLP BACKPLANE INTERFACE MEZZANINE CARD (same as SP design) LVDS DRIVERS AND SCSI-3 CONNECTORS Muon Sorter Rice n Sorts up to 36 muons from 12 SP’s and transmits best 4 to GMT n Have 4 boards in hand, one stuffed (except for backplane interface) n Sorter testing is in progress, will test with Track-Finder in the autumn n Only 1 needed in CMS

CSC Muon Trigger September 16, 2003 CMS Annual Review 14 CSC Test Beam Studies 2003 n First structured beam period May 23-June 1 u Trigger primitives tests were highly successful: l Reliable high-rate trigger and DAQ system l ALCT timing tests, CLCT and TMB studies l High-rate tests and HV, threshold, angle scans u MPC-to-SP optical link data transfer unsuccessful (synch. problems) n Unstructured beam period June u Improved low- and high-rate CLCT and TMB studies, angle scans n Second structured beam period Sept u Patches to fix optical link data transfer from MPC to SP u New readout shell program (fully OO software)

CSC Muon Trigger September 16, 2003 CMS Annual Review Time-structured Beam Test Setup Peripheral Crate 2 DMB, 2 TMB 1 CCB, 1 MPC FED crate 1 DDU PC TTC crate DAQ Data Trigger primitives S1 S2 S3 beam CSC 1 CSC 2 Track finder Crate TRIDAS n X5A Setup

CSC Muon Trigger September 16, 2003 CMS Annual Review 16 Typical Muon Event Raw data includes 8 or 16 time bins history

CSC Muon Trigger September 16, 2003 CMS Annual Review 17 Structure repeats during 2.6 s spill length 48 bunches 25 ns bunch spacing bunch width 3-5 ns SPS orbit period 1.2  s 23  s 2003 Time-Structured Test Beam n Optimal timing found n High efficiency (~98-99%) achieved n Peripheral crate system basically working as desired n Small CLCT efficiency loss at high rates, almost no ALCT efficiency loss Scintillation Counters 48 bunches BX Number ALCT

CSC Muon Trigger September 16, 2003 CMS Annual Review 18 CSC Bunch ID From ALCT Timing n First, tune the ALCT data latching in 2 ns intervals (0-32ns) and maximize the single-BX fraction of events: n Then look at the BX distribution relative to BX from scintillator (L1A): n ALCT BX efficiency 98.7%

CSC Muon Trigger September 16, 2003 CMS Annual Review 19 CLCT Positions n Key CLCT half strip from chamber 2 vs.1: u On fine scale “staircase” structure indicates good trigger position resolution u (note that chamber 1 is vertically higher, thus the offset in position)

CSC Muon Trigger September 16, 2003 CMS Annual Review 20 CSC Trigger High Rate Tests Expected LCT rate at LHC < 25 KHz (ME1/1) data consistent with dead-time = 225 ns Chamber #1 CLCT ,000 1,500 2, ,0001,5002,0002,5003,000 Beam Intensity (KHz) CLCT Rate (KHz)

CSC Muon Trigger September 16, 2003 CMS Annual Review 21 CSC Track Finder Test u Successfully passed optical link loopback tests and MPC  SP chain tests using 40 MHz crystal oscillator to drive system u MPC  SP optical link tests failed at the structured beam tests in May 2003 (link errors every few ms) u Clock was derived from TTC system (mi  vi  vx  rx) u Combined clock jitter presumably too large to drive optical links u PLL was not used to clean clock (i.e. QPLL was not available) Sector Processor 2 CSCs

CSC Muon Trigger September 16, 2003 CMS Annual Review Unstructured Test Beam Results n Very high efficiencies achieved u Highest trigger efficiency of 99.9% required low rate (few kHz) n Improved DAQ throughput allowed readout up to 80k full events per spill. Typical “run” is 1 or 2 spills. n Improved scans taken: u Logic scope read out on most data u HV scan u Comparator threshold scan u Pattern requirements scan u Angle scans

CSC Muon Trigger September 16, 2003 CMS Annual Review 23 ALCT Production Testing - Example n ~510 Boards, ~ Channels n Semi-automated procedures n Using 3 test stations u 2 for testing u 1 for fixing n Crew of up to 14 students testing (3 FTE) n Sign-off sheets to track testing failures n Test before and after 2-day burn-in n 2 students trained for fixing n 1 engineer for difficult cases n 1 postdoc supervises it all

CSC Muon Trigger September 16, 2003 CMS Annual Review 24 Testing Other CSC Trigger Boards n TMBs (468+spares) testing (Emu): u Production testing with loop-back board tests all I/O (already built) u In-situ CMS testing by pulsing analog levels on CFEBs, reading comparators; also recording digital outputs to MPC and DDU. n MPCs (60+) production or in-situ CMS testing: u Inputs will be tested at full speed with FIFO on TMB u Outputs will be tested at full speed with input FIFO of SP u VME readout n SPs (12+): u Like MPC but with inputs from MPC, outputs to MS n CCBs (60+): u Simple module function, tested on bench and by exercising peripheral and Track Finder crate functions n MS (1+): u With only 1+spares, can be tested by hand as well as with input data from FIFOs on SP outputs

CSC Muon Trigger September 16, 2003 CMS Annual Review 25 Plans for Integration and Slice Tests n Test beam 2003 is the first full chain test from 2 CSC chambers to SP input n Sept. test beam cycle goals (see next slides): u Validate that correct trigger primitives are found and successfully received over optical links u Record as much data as possible under various detector configurations for future track identification studies n Will perform DT  CSC TF interface tests the week following Sept. beam test n Next (6/04) structured test beam cycle will test pre-production boards (CCB, MPC, SP, TTC+QPLL) n 6/04-3/05 Slice Test (on surface) u Really begins with next summer test beam 6/04 u Use 2 full CSC peripheral crates, covering 2 stations x 60 degrees at SX5 n 9/1/05 Commissioning begins in UX5 u Integration with CMS-wide systems important for Track Finder: Slow controls (downloading), database, connection to Global Muon Trigger, software framework, time synchronization studies n 1/1/07 Commissioning ends at UX5

CSC Muon Trigger September 16, 2003 CMS Annual Review 26 Sector Processor Clock Patch Voltage Controlled Crystal Oscillator PLL Patch Low jitter Output Cleans Backplane clock to drive SP logic x2 BackPlane Clock supplies reference to TLK2501 LVDS Repeater Delivers Multiplied Clock to Front FPGAs to Drive TLK2501 clock input VCXO and PLL added to clean synchronous clock

CSC Muon Trigger September 16, 2003 CMS Annual Review 27 SP Patch Results ConditionsType of TestTimeErrors Patched CCB Clock, 100m fibers SP  SP loopback PRBS test 5 hours x 3 links0 “ MPC  SP PRBS test (within same TF crate) 24 hours x 3 links0 TTCvx with MHz XO Patch MPC  SP PRBS test (within same TF crate) 32 hours x 3 links0 “ MPC  SP PRBS test (peripheral crate to TF crate) with L1A 100kHz. 14 hours x 3 links0 n Eagerly awaiting QPLL chips from CERN

CSC Muon Trigger September 16, 2003 CMS Annual Review 28 Preparation for Sept Beam Test CSCs Scintillator Panels HV Supply CCB MPC DDU Dynatem TMB DMB SP CCB SBS TTCvi TTCvx Cosmic ray test stand in Florida System brought to working order (everything now shipped to CERN) TF Crate Periph Crate

CSC Muon Trigger September 16, 2003 CMS Annual Review 29 CSC Trigger FY02-05 L2,3 Milestones - I n Begin Proto. 2 u Begin MPC Proto. 2 u Begin SR/SP Proto. u Begin Backplane Proto. 2 u Begin CCC Proto. 3 u Begin Sorter Proto. n Finish Proto. 2 u Finish MPC Proto. 2 u Finish SR/SP Proto. u Finish Backplane Proto. 2 u Finish CCC Proto. 3 u Finish Sorter Proto. n Finish Proto. 2 Test u Finish MPC Proto. 2 Test u Finish SR/SP Proto. Test u Finish Backplane Proto. 2 Test u Finish CCC Proto. 3 Test u Finish Sorter Proto. Test n Finish Final Design u Finish MPC Final Design u Finish SR/SP Final Design u Finish Backplane Final Design u Finish CCC Final Design u Finish Sorter Final Design 5/14/01 10/1/01 5/14/01 6/24/03 9/30/02 1/30/03 2/28/03 8/19/02 3/31/03 9/30/03 4/30/03 9/30/03 3/31/04 √ √ (except P T memories, ordered) √ 2/28/04 9/30/03 1/30/04 2/28/04 √ but needs redesign 2/28/04 GMT integration? 7/30/04 3/31/04 7/30/04

CSC Muon Trigger September 16, 2003 CMS Annual Review 30 CSC Trigger FY02-05 L2,3 Milestones - II n Begin Production u Begin MPC Production u Begin SR/SP Production u Begin Backplane Production u Begin CCC Production u Begin Sorter Production n Finish Production u Finish MPC Production u Finish SR/SP Production u Finish Backplane Production u Finish CCC Production u Finish Sorter Production n Begin Installation u Begin MPC Installation u Begin SR/SP Installation u Begin Backplane Installation u Begin CCC Installation u Begin Sorter Installation n Finish Installation u Finish MPC Installation u Finish SR/SP Installation u Finish Backplane Installation u Finish CCC Installation u Finish Sorter Installation 8/1/04 4/1/04 8/1/04 3/31/05 4/1/05 5/1/05

CSC Muon Trigger September 16, 2003 CMS Annual Review 31 CSC Trigger FY02-05 L2,3 Milestones - III n Begin System Tests u Begin MPC System Tests u Begin SR/SP System Tests u Begin Backplane System Tests u Begin CCC System Tests u Begin Sorter System Tests n Finish System Tests u Finish MPC System Tests u Finish SR/SP System Tests u Finish Backplane System Tests u Finish CCC System Tests u Finish Sorter System Tests 6/1/05 9/30/05

CSC Muon Trigger September 16, 2003 CMS Annual Review 32 Conclusions n The CSC system is in very good shape: u Chambers being mounted on disks at SX5 u Majority of the chambers already built and tested, including on- chamber electronics u Test beam showed that CSC peripheral crate electronics work very well under “battle conditions” n Of course, much work remains: u We especially need to validate the optical link clocking for MPC-SP data transfer u Production starts soon for peripheral crate electronics u Production planning will start soon for Track Finder (MPC, SP, MS) boards