The Synthesis of Cyclic Combinational Circuits Marc D. Riedel and Jehoshua Bruck California Institute of Technology {riedel,
Combinational Circuits The outputs depend only on the present values of inputs. time t inputs 1 x 2 x m x Combinational Circuit ),,( 11m xxf ),,( 12m xxf ),,( 1mn xxf time (t+Δt) outputs }1,0{}1,0{:, m j fj }1,0{, i xi
Generally acyclic (i.e., feed-forward) structures. Combinational Circuits y x y x y x z z z 1 f 2 f
Generally acyclic (i.e., feed-forward) structures. Combinational Circuits
Circuits With Cycles abc 1 f 2 f 3 f May depend on timing. May have unstable/unknown outputs.
Circuits With Cycles 01 1 ? ?? 0: non-controlling for OR 1: non-controlling for AND May depend on timing. May have unstable/unknown outputs.
Cyclic Combinational Circuits Cyclic circuits can be combinational. Example due to Rivest (1977): abcabc f1f1 f2f2 f3f3 f4f4 f5f5 f6f6
Cyclic Combinational Circuits bcbc f1f1 f2f2 f3f3 f4f4 f5f5 f6f6 1 1 Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits bcbc f1f1 f2f2 f3f3 f5f5 f6f Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits bcbc f1f1 f2f2 f3f3 f5f5 f6f6 aa f4f4 Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits bcbc f1f1 f2f2 f3f3 f4f4 f5f5 f6f6 0 0 Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits bcbc f2f2 f3f3 f4f4 f5f5 f6f Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits There is feedback is a topological sense, but not in an electrical sense. bcbc f2f2 f3f3 f4f4 f5f5 f6f6 f1f1 aa Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits There is feedback is a topological sense, but not in an electrical sense. bcbcaa )(cba )(bac )(cab cab cba bac Cyclic circuits can be combinational. Example due to Rivest (1977):
3 inputs, 6 fan-in two gates. An equivalent acyclic circuit requires 7 fan-in two gates. Cyclic Combinational Circuits bcbcaa )(cba )(bac )(cab cab cba bac Cyclic circuits can be combinational. Example due to Rivest (1977):
Cyclic Combinational Circuits bcbcaa )(cba )(bac )(cab cab cba bac Cyclic circuits can be combinational. Example due to Rivest (1977): n inputs, 2n fan-in two gates ( n odd). An equivalent acyclic circuit requires 3n – 2 fan-in two gates.
Prior Work F(X)F(X)G(X)G(X) e.g., add e.g., shift Stok (1992) observed cycles in designs that reuse functional units: Malik (1994), Shiple et al. (1996), Edwards (2003) proposed techniques for analyzing cyclic combinational circuits. X G(F(X)) Y F(G(Y))
Synthesis of Cyclic Combinational Circuits We propose a general methodology: optimize by introducing cycles in the substitution/minimization phase. We demonstrate that optimizations are significant and applicable to a wide range of circuits.
Example: 7 Segment Display Inputs a b c d e f g Output xxxx
Example: 7 Segment Display a b c d e f g Output
Substitution/Minimization Basic minimization/restructuring operation: express a function in terms of other functions. Substitute b into a: (cost 9) a ))(( xxxxxxxxx (cost 8) Substitute c into a: (cost 5) Substitute c, d into a: (cost 4) a )( bxxxxxbx a cxxcx 321 a dccx 1
Acyclic Substitution g f e b a c d Select an acyclic topological ordering: g f e d c b a
g f d c b a edcaxx 21 dccx 1 xxxxxxxxx ))((dxxxxxx )(cdxx 10 )( Select an acyclic topological ordering: Cost (literal count): 37 Acyclic Substitution e 3 cxb d ba f
Select an acyclic topological ordering: Nodes at the top benefit little from substitution. g f d c b a edcaxx 21 dccx 1 xxxxxxxxx ))((dxxxxxx )(cdxx 10 )( e 3 cxb d ba f
Cyclic Substitution Try substituting every other function into each function: Not combinational! Cost (literal count): 30 0 1 ex dccx fba geex bcdx gxaxex egxxax f g f d c b a e
Cyclic Substitution g f e d c b a Cost (literal count): 34 Combinational solution: xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f
Cyclic Substitution Cost (literal count): 34 Combinational solution: topological cycles g f e d c b a xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f
Inputs x 3, x 2, x 1, x 0 Cost (literal count): 34 ba ga e e e c 1 no electrical cycles Cyclic Substitution g f e d c b a xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f = [0,0,1,0]:
g f e d c b a Cost (literal count): 34 ba ga e e e c 1 Cyclic Substitution no electrical cycles xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:
g f e d c b a Cost (literal count): 34 ba ga e e e c 1 a b c d e f g Cyclic Substitution xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:
g f e d c b a Cost (literal count): 34 ba ga e e e c 1 a b c d e f g Cyclic Substitution xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:
g f e d c b a Cost (literal count): 34 ba ga e e e c 1 a b c d e f g Cyclic Substitution xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:
g f e d c b a Cost (literal count): 34 Cyclic Substitution xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]:
g f e d c b a Cost (literal count): 34 Cyclic Substitution ba a a 1 0 c f xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]: no electrical cycles
g f e d c b a Cost (literal count): 34 Cyclic Substitution ba a a 1 0 c f xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f no electrical cycles Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]:
g f e d c b a Cost (literal count): 34 a b c d e f g Cyclic Substitution ba a a 1 0 c f xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]:
g f e d c b a Cost (literal count): 34 Cyclic Substitution ba a a 1 0 c f a b d e f g xe 0 bxa 3 gxxxax 1023 )( axxex 321 )( exxxxxx )( cxxcx 301 xxxfx 1023 )( f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]: c
Analysis Efficient, symbolic framework for analysis (BDD-based). Analysis is integrated with synthesis phase. For details see: “Cyclic Combinational Circuit: Analysis for Synthesis,” IWLS’03, available at
Combinationality Analysis: ensure that there are no sensitized cycles. Timing Analysis: find the length of sensitized paths. Analysis
Synthesis Strategy: Allow cycles in the substitution phase of logic synthesis. Find lowest-cost combinational solution )( )( )( xxxxxc xxxxxxb xxxxxxa Collapsed: Cost: xxaxc cxxxxb xxbxa Solution: Cost: 13
“Break-Down” approach Exclude edges Search performed outside space of combinational solutions cost 12 cost 13 cost 12 cost 13 combinational cost 14 Branch and Bound
“Build-Up” approach Include edges Search performed inside space of combinational solutions cost 17 cost 16 cost 15 not combinational cost 14 Branch and Bound cost 13 best solution
Implementation: CYCLIFY Program Incorporated synthesis methodology in a general logic synthesis environment (Berkeley SIS package). Trials on wide range of circuits –randomly generated –benchmarks –industrial designs. Consistently successful at finding superior cyclic solutions.
Benchmark Circuits Cost (literals in factored form) of Berkeley SIS Simplify vs. Cyclify Circuit# Inputs# OutputsBerkeleySimplifyCaltechCyclifyImprovement dc % ex % p % t % bbsse % sse % 5xp % s % dk % apla % tms % cse % clip % m % s % t % ex % exp % (best examples)
Benchmarks Example: EXP circuit Cyclic Solution (Caltech CYCLIFY ): cost 262 Acyclic Solution (Berkeley SIS ): cost 320 cost measured by the literal count in the substitute/minimize phase
Discussion Should think of combinational circuits as cyclic, in general. Most circuits can be optimized with cycles. Optimizations are significant. General methodology for synthesis. Efficient, symbolic framework for analysis. Cyclic Combinational Circuits: Paradigm shift:
Future Directions Extend ideas to a decomposition and technology mapping phases of synthesis. Address optimization of cyclic circuits for delay, power, fault tolerance.