Research Interests, Projects, Collaborations & Opportunities Priyank Kalla Electrical & Computer Engineering University of Utah

Typical Design Flow & CAD Support TLM Models High-Level Analysis Hardware Description Design Spec High-Level Synthesis Optimization Testing for Defects Fabrication Circuit Models Mask High-Level + Logic Synthesis & Optimization Area, Speed, Power

Design Verification TLM Models Property Verification Hardware Description Design Spec High-Level Synthesis Optimization Fabrication Circuit Models Mask “Core Engines” for Correctness Reasoning & Constraint Solving Equivalence Verification ?

My Research Projects at the U Boolean Reasoning Engines (concluded) Million+ variables, 10s Million Constraints 2 M.S. + 1 PhD “Exploring” Design Automation for Photonic Devices Collaboration w/ Steve Blair + his Colleagues 1 PhD student: Learning & Exploring the issues Synthesis & Verification of Finite-Precision Arithmetic Focus on Hardware – but applicable to Software 2 PhDs. + 2 more for sure… Recognition + bread-earner [3 NSF Grants]

Datapath-Dominated Applications Floating-point Model Automated Fixed-point Generation Fixed-point Model Equivalence Verification ? Real Number Specification Conversion Utility Optimization Synthesis FPGA HDL Model Matlab Xilinx Altera Synplicity Synopsys Calypto Galois DSP Crypto Embedded ASIC

Why Verify Finite-Precision Arithmetic 1996 Ariane Rocket Explosion 64-bit floating to fixed point rounding error Vancouver Stock-Exchange Index 1982: Value initialized to 1000; 1984: value 520 Truncation error: Should have been 1098 Gulf War, Patriot Missile (28 dead, SCUD) German Parliament: 5.0% versus 4.97% (2-bits!) Bug in JPEG Decode Routine (discovered in ’05) Hacker Exploited – uploaded a virus: Microsoft website Network Routers, Filter instability errors + ……

[Peymandoust et al, TCAD '03] MP3 Decoder: Anti-Aliasing Function MAC x = a 2 + b 2 ab x F DFF coefficients Taylor series expansion

Example: Anti-Aliasing Function F[15:0] = 156x x x x x x G[15:0] = 156x x x x x x F ≠ G F[15:0] = G[15:0] Prove that F(x) % 2 16 ≡ G(x)% 2 16 Contemporary tools model the problem at (circuit) bit-level Too many variables/constraints – infeasible Name of the game: “Abstraction” + model the “details”

Fixed-Size (m) Data-path: Modeling  Control the datapath size: Fixed size bit-vectors (m) * + 8-bit 16-bit 17-bit  Bit-vector of size m : integer values in 0,…, 2 m -1 Fixed-size (m) bit-vector arithmetic Polynomials reduced %2 m Algebra over the ring Z 2 m * + 16-bit

Why is the Problem Difficult? Z 2 m is a non-Unique Factorization Domain F = x 2 + 6x in Z 8 (modulo 8) can be factorized as Easy to do over Reals, Complex numbers, Integers (modulo p) Textbook algebra solutions are not available over Z 2 m Contacted a Mathematician: Prof. Florian Enescu Partially unsolved Problems in “classical” mathematics F x+6 F x+4x+2x

“Zero” in Finite-Precision F[15:0] = 156x x x x x x G[15:0] = 156x x x x x x F ≠ G F[15:0] = G[15:0] F[15:0] - G[15:0] = 0? F - G [15:0] = x x x x x

Ideals in Finite Rings Test for membership in the ideal of vanishing polynomials Standard Problem formulation in Computer Algebra But, how to “mathematically” generate this “ideal”? Hilbert’s & Fermat’s results (mod p): Generalize to (mod p m ) Ideal x x % 2 m % 2 m 0 f g f – g ? Z2mZ2m Z2m[x]Z2m[x]

Contributions Abstraction of Arithmetic Datapaths Equivalence Verification Problem Equivalence of Polyfunction Equivalence of Polynomial systems Ideal Membership Testing Canonical Forms Simulation Vector Generation ADD/MULT Generalized to cover all Bit-Vector Arithmetic

Significance, Impact, Interest Computer-algebra research group, Univ. Kaiserslautern SINGULAR: Public domain computer algebra tool Our approach implemented in their latest release Univ. Kaiserslautern: Math + ECE + Infineon Extension of my work to verify production-quality design Univ. of Tokyo + Fujitsu Use our work for Testing SoC (ATPG) Bay-area Start-up: Calypto (NSF GOALI Partner) GALOIS Inc., Cryptography applications (military funding) Invited Talk: Intl. Joint Conferences on Automated Reasoning Theoretical Computer Science Community