Presenter : Shao-Jay Hou. Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from pre-silicon.

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Presentation transcript:

Presenter : Shao-Jay Hou

Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from pre-silicon verification. One effective silicon debug technique is to monitor and trace the behaviors of the circuit during its normal operation. However, designers can only afford to trace a small number of signals in the design due to the associated overhead. Selecting which signals to trace is therefore a crucial issue for the effectiveness of this technique. This paper proposes an automated trace signal selection strategy that is able to dramatically enhance the visibility in post-silicon validation. Experimental results on benchmark circuits show that the proposed technique is more effective than existing solutions.

Many tricky bugs only manifest themselves after a long period of operations and hence are difficult to identify with the above techniques that reuse test structures for debug. Traditional debug method :  Scan chain 。 Have to stop the hardware  Trace signal 。 Buffer size So, the paper define the gate-level restorabilities for visibility enhancement algorithm and a automated trace signal selection algorithms

Signal use Debug use Tracer use My thesis Tracer improve Compression method This paper

Signal selection define[8] This paper Scan chain use[11,13] Debug platform[1,4] FFS use in scan chain[7] Monitor technique[2,3,10,12,14] Traditional debug Improve and compare Trace technique

Restoration ratio :

Forward & Backward Use mathematic method and logic operation

Define problem :  How to set SV to be ‘1’ for a constrained number of signals (FFs and/or input signals), so that the circuit’s total visibilities (TV = ΣV0+ΣV1) for all state elements is maximized Terminology :  FFs: filp-flop in scan chain  TV: total visibility  CUD: circuit under debug

Setup  Benchmark: ISCAS’89  3 type of signal : 。 8 bit 。 16 bit 。 32 bit Result

The paper proposed a new automated trace signal selection methodology to enhance visibility in post-silicon validation And the paper compare with the reference [8].

The paper give a good idea for trace signal selection  By relationship But the more stringent define of function have to read the reference[8]