Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker

Signed Numbers (3bits) sign magnitudeone’s complementtwo’s complement = = = = = = = = = = = = = = = = -1

Two’s complement The unsigned sum of an n-bit number with its negative yields? Example with 3 bits: = = = 2 n => negate(x) = 2 n -x =

Negating Signed Integers Suppose that you have an n-bit integer in two’s complement representation Negate positive to negative: = 3  = -3 invert bits and add 1 Negate negative to positive Trick: invert bits and add 1 -3 =  

Just like in grade school (carry/borrow 1s) Two's complement operations easy subtraction using addition of negative numbers 0111 = = Addition & Subtraction

Detecting Overflow OperationOperand AOperand BOverflow if result A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

MIPS instructions lb loads a byte and stores the sign- extended version in a word. lbu loads a byte and stores it in a word Which of these two is typically used to process characters?

Logic Gates: AND AND a b c a b c

Logic Gates: OR OR a b c a b c

Let's build an ALU to support the andi and ori instructions Selection of operation 0 = and, 1 = or we'll just build a 1 bit ALU, and use 32 of them Possible Implementation (sum-of-products): b a operation result An ALU (arithmetic logic unit)

Selects one of the inputs to be the output, based on a control input Build (and/or) ALU using a MUX S C A B 0 1 The Multiplexor note: it is called a 2-input mux even though it has 3 inputs!

Not easy to decide the “best” way to build something Don't want too many inputs to a single gate for our purposes, ease of comprehension is important Don’t want to have to go through too many gates Let's look at a 1-bit ALU for addition: Different Implementations c out = a b + a c in + b c in sum = a xor b xor c in

Different Implementations How could we build a 1-bit ALU for add, and, and or? How could we build a 32-bit ALU?

Building a 32 bit ALU

Two's complement approach: just negate b and add. How do we negate? A solution: What about subtraction (a – b) ?