A CMOS Front-end Amplifier Dedicated to Monitor Very Low Amplitude Signals from Implantable Sensors ECEN 5007 Mixed Signal Circuit Design Sandra Johnson

Paper Overview Ultra low amplitude signal measurement module for implantable sensors Overcome dominant noise of differential amplifier input stage (1/f flicker noise, thermal noise, DC offset) CHopper Stabilization technique (CHS) based on amplitude modulation of desired signal System Diagram Measurement Results Signal Bandwidth< 4.5kHz Chopper Frequency37.6kHz DC Gain 51dB Modulator Rail-to-Rail OTA supply=1.8V Selective Amplifier 2nd order Gm-C BPF (f c tracks f chop ) LPF V sig V out

Describe CHopper Stabilization Technique Review AM Basics Ideal CHopper Amplifier Simulation Results Modulator Block Simulation Results Ideal CHopper Amp and Modulator Block Simulation Results Conclusion Presentation Overview

CHopper Stabilization Technique The signal is amplitude modulated at a minimum of 2 times its frequency. Amplitude modulation translates the signal to a frequency above the noise and the voltage offset of the preamp stage. The modulated signal is then input into a preamp where it is added with the offset voltage and noise, and then amplified. The amplified output is amplitude modulated with the same carrier signal as the original low power, low frequency signal. The second modulation stage demodulates the amplified neural signal back to its baseband frequency, while modulating the noise and offset voltage signals up to the carrier frequency. The combined signal is then passed through a low pass filter eliminating the unwanted higher frequency components.

Amplitude Modulation Basics V IN c 1 (t) c 2 (t) V OUT X X V MOD V DEMOD

CHopper Stabilization Technique V IN Modulation Noise & Offset VAVA V OUT T c 1 (t) t T c 2 (t) t V IN c 1 (t) c 2 (t) V OUT V OS +V N X X VAVA A(f) pre-amp 2nd Modulation (Demodulation)

Ideal CHopper Amplifier - Block Diagram

Ideal CHopper Amplifier - Sim Results For simplicity, Vsig is chosen to be a sinewave of 4.5kHz, with maximum amplitude of 100uV The signal is fed into the multiplier where it is multiplied by the carrier, a 37.6kHz squarewave having an amplitude of 1V. Vsig is effectively modulated and appears at the odd harmonics of the carrier. Its now split into two 50uV signals at approx 33kHz (fc-fm) and 42kHz (fc+fm) The noise is represented as a sum of many sinewaves at amplitudes and frequencies similar to those found in the offset, flicker and thermal noise of the amplifier. The noise and the amplitude modulated signal are added. Notice, in the time domain, how Vsig rides on top of the noise when it is modulated.

Ideal CHopper Amplifier - Sim Results The amplifier has a gain of 100. The modulated sidebands have an amplitude of 5mV (0.5*Am*Ac, where Ac=1V) The modulated signal is passed through a BPF, where the low frequency noise is eliminated. The signal passes through the second multiplier block and is multiplied with the same carrier. The results show a signal at 4.5kHz (the original Vsig frequency) at an amplitude of approx 5mV (0.5*Am * Ac 2 ), and two signals with approx amplitudes of 2.5mV at frequencies 70.7kHz and 79.7kHz (2*fc-fm, 2*fc+fm) Finally the signal is passed through a LPF resulting in an amplified version of Vsig.

Modulation/Demodulation Block All switches are n-type devices  is a square wave whose voltage is high enough to drive the transistors into triode, and whose frequency is at least twice that of V SIG When  is high; M1/M2 are ON, M3/M4 are OFF, V OUT = V SIG When  is low; M1/M2 are OFF, M3/M4 are ON, V OUT = -V SIG V OUT is an amplitude modulated signal located at the odd harmonics of the carrier frequency    V SI G V OUT ~ M1 M2 M3M4

Modulator/Demodulator Block - Sim Results (clock feedthrough) Vsig affected by clock feedthrough of modulator. Very "noisy" in the frequency domain. Used C L =1nF to achieve the above signal. Will need additional options (dummy switches, etc) to combat clock feedthrough. C L = 0pF C L = 10pF C L = 100pF C L = 1000pF

Ideal CHopper Amplifier with Modulator - Block Diagram

Ideal CHopper Amplifier with Modulator - Sim Results Vsig is chosen to be a sinewave of 4.5kHz, with maximum amplitude of 100uV The signal is fed into the modulator circuit, where it modulates the amplitude of the 37.6kHz carrier signal. It's now split into two 50uV signals at approx 33kHz (fc-fm) and 42kHz (fc+fm) The noise is represented as a sum of many sinewaves at amplitudes and frequencies similar to those found in the offset, flicker and thermal noise of the amplifier. The noise and the amplitude modulated signal are added. Notice, in the time domain, how Vsig rides on top of the noise when it is modulated.

Ideal CHopper Amplifier with Modulator - Sim Results The amplifier has a gain of 100. The modulated sidebands have an amplitude of 5mV (0.5*Am*Ac, where Ac=1V) The modulated signal is passed through a BPF, where the low frequency noise is eliminated. The signal passes through the second modulator circuit where its amplitude modulates the second carrier signal of 37.6kHz. The results show a signal at 4.5kHz (the original Vsig frequency) at an amplitude of approx 5mV (0.5*Am * Ac 2 ), and two signals with approx amplitudes of 2.5mV at frequencies 70.7kHz and 79.7kHz (2*fc-fm, 2*fc+fm) Finally the signal is passed through a LPF resulting in an amplified version of Vsig.

Paper results –Chip fabricated in 0.35u technology by CMC –Layout core area size 0.52mm 2 –CHopper frequency and BPF corner frequency ~37kHz –BPF quality factor, specified at 4, allows for a signal bandwidth of up to 4.5kHz –Power Consumption 775uW –DC gain 51dB CHopper amplifier is able to overcome dominant noise source of the differential input stage, for low frequency, ultra low amplitude signals Simulating the ideal CHopper amplifier with modulator circuit block, a voltage gain of 50 times the input voltage (~34dB) was realized using an ideal pre-amp with 20dB gain and an ideal BPF (no gain). Issues –Clock feedthrough –Accuracy of FFT function for frequency domain results –Accuracy of ideal filter blocks Conclusion