Computer Logic and Digital Design Chapter 2 Henry Hexmoor AND logic

Slides:



Advertisements
Similar presentations
Types of Logic Circuits
Advertisements

Chapter 2 Logic Circuits.
Gate-Level Minimization. Digital Circuits The Map Method The complexity of the digital logic gates the complexity of the algebraic expression.
EECC341 - Shaaban #1 Lec # 5 Winter Switching Algebra: Principle of Duality Any theorem or identity in switching algebra remains true if.
1 Section 10.1 Boolean Functions. 2 Computers & Boolean Algebra Circuits in computers have inputs whose values are either 0 or 1 Mathematician George.
Karnaugh Maps for Simplification
 Analysis and Synthesis:  Analysis start with a logic diagram and proceed to a formal description of the function performed by that circuit, such as.
Example: Given a 4-bit input combination N=N 3 N 2 N 1 N 0, this function produces a 1 output for N=1,2,3,5,7,11,13, and 0 otherwise.  According to the.
Computer Engineering (Logic Circuits) (Karnaugh Map)
1 EECC341 - Shaaban #1 Lec # 6 Winter Combinational Circuit Analysis Example Given this logic circuit we can : Find corresponding logic.
Chapter 2: Combinatorial Logic Circuits Illustration Pg. 32 Logic Circuit Diagrams - Circuit Optimization -2,3,4 level maps 48 elements Optimized to 25.
Conversion between number systems:
EECC341 - Shaaban #1 Lec # 7 Winter Combinational Circuit Minimization Canonical sum and product logic expressions do not provide a circuit.
IKI a-Simplification of Boolean Functions Bobby Nazief Semester-I The materials on these slides are adopted from those in CS231’s Lecture.
Overview Part 2 – Circuit Optimization 2-4 Two-Level Optimization
Chapter 2: Boolean Algebra and Logic Functions
11.1 Boolean Functions. Boolean Algebra An algebra is a set with one or more operations defined on it. A boolean algebra has three main operations, and,
Boolean Algebra Boolean algebra Boolean algebra, like any other deductive mathematical system, may be defined with –a set of elements, –a set of operators,
IKI a-Boolean Algebra Bobby Nazief Semester-I The materials on these slides are adopted from those in CS231’s Lecture Notes at UIUC,
BOOLEAN ALGEBRA Saras M. Srivastava PGT (Computer Science)
Boolean Algebra and Digital Circuits
Switching functions The postulates and sets of Boolean logic are presented in generic terms without the elements of K being specified In EE we need to.
1 Representation of Logic Circuits EE 208 – Logic Design Chapter 2 Sohaib Majzoub.
Department of Computer Engineering
Combinational Logic 1.
Dr. Eng. Farag Elnagahy Office Phone: King ABDUL AZIZ University Faculty Of Computing and Information Technology CPCS 222.
Boolean Algebra 1854, George Boole created a two valued algebraic system which is now called Boolean algebra. 1938, Claude Shannon adapted Boolean algebra.
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. Circuit Optimization Logic and Computer Design Fundamentals.
Overview Part 1 – Gate Circuits and Boolean Equations
Boolean Algebra Combinational-Circuit Analysis We analyze a combinational logic circuit by obtaining a formal description of its logic function. Once.
Chapter 4 Combinational Logic Design Principles. Overview Objectives -Define combinational logic circuit -Analysis of logic circuits (to describe what.
Boolean Algebra Introduction Logical arguments are valid (or not) by virtue of their form, not content Example All men are mortal(premise 1) Harry is a.
Gate-Level Minimization
Chapter 2 Two- Level Combinational Logic. Chapter Overview Logic Functions and Switches Not, AND, OR, NAND, NOR, XOR, XNOR Gate Logic Laws and Theorems.
CHAPTER 3: PRINCIPLES OF COMBINATIONAL LOGIC
Lecture 4 Nand, Nor Gates, CS147 Circuit Minimization and
LOGIC GATES & BOOLEAN ALGEBRA
Unit 1 Minimization Techniques and Logic Gates. Introduction to Digital Systems Analog devices and systems process time-varying signals that can take.
Based on slides by:Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. ECE/CS 352: Digital System Fundamentals Lecture 6 – Canonical Forms.
February 2, 2004CS 2311 Karnaugh maps Last time we saw applications of Boolean logic to circuit design. – The basic Boolean operations are AND, OR and.
ECE 3110: Introduction to Digital Systems
ENG241 Digital Design Week #2 Combinational Logic Circuits.
1 Boolean Algebra  Digital circuits Digital circuits  Boolean Algebra Boolean Algebra  Two-Valued Boolean Algebra Two-Valued Boolean Algebra  Boolean.
Karnaugh Maps (K-Maps)
CS231 Boolean Algebra1 Summary so far So far: – A bunch of Boolean algebra trickery for simplifying expressions and circuits – The algebra guarantees us.
LOGIC CIRCUITLOGIC CIRCUIT. Goal To understand how digital a computer can work, at the lowest level. To understand what is possible and the limitations.
A. Abhari CPS2131 Chapter 2: Boolean Algebra and Logic Gates Topics in this Chapter: Boolean Algebra Boolean Functions Boolean Function Simplification.
1 Lect # 2 Boolean Algebra and Logic Gates Boolean algebra defines rules for manipulating symbolic binary logic expressions. –a symbolic binary logic expression.
ECE 3110: Introduction to Digital Systems Chapter #4 Review.
Digital Design: Principles and Practices Chapter 4 Combinational Logic Design Principles.
CMPUT Computer Organization and Architecture II1 CMPUT329 - Fall 2002 Topic2: DeMorgan Laws José Nelson Amaral.
June 12, 2002© Howard Huang1 Karnaugh maps Last time we saw applications of Boolean logic to circuit design. – The basic Boolean operations are.
Karnaugh Map (K-Map) By Dr. M. Khamis Mrs. Dua’a Al Sinari.
Digital Logic (Karnaugh Map). Karnaugh Maps Karnaugh maps (K-maps) are graphical representations of boolean functions. One map cell corresponds to a row.
Boolean or, Switching Algebra. Switching Algebra The two-valued Boolean algebra is also called “Switching algebra” by engineers and computer scientists.
CS231 Boolean Algebra1 Circuit analysis summary After finding the circuit inputs and outputs, you can come up with either an expression or a truth table.
Mu.com.lec 9. Overview Gates, latches, memories and other logic components are used to design computer systems and their subsystems Good understanding.
CHAPTER 2 Boolean algebra and Logic gates
Chapter 2: Boolean Algebra and Logic Functions
14:332:231 DIGITAL LOGIC DESIGN Boolean Algebra
ECE 2110: Introduction to Digital Systems
ECE 20B, Winter 2003 Introduction to Electrical Engineering, II LECTURE NOTES #2 Instructor: Andrew B. Kahng (lecture)
CS 105 Digital Logic Design
ECE 3110: Introduction to Digital Systems
17-Nov-18 Logic Algebra 1 Combinational logic.
Boolean Algebra.
Boolean Algebra.
CSE 370 – Winter Combinational Logic - 1
Chapter 4 Combinational Logic Design Principles. Overview Objectives -Define combinational logic circuit -Analysis of logic circuits (to describe what.
Presentation transcript:

Computer Logic and Digital Design Chapter 2 Henry Hexmoor AND logic input output AND Gate B AB S1 . S2 S1 S2 path? off off no on off no off on no on on yes Henry Hexmoor

OR logic input S1 + S2 S1 S2 path? off off no on off yes off on yes S1 on on yes S1 S2 output Henry Hexmoor

NOT logic S S' S 1 0 0 1 S Henry Hexmoor

Equivalent Symbols of NAND, NOR Gates NAND Symbols Normal Symbol Alternate NAND Symbol X Y (X . Y)’ X Y X’ + Y’ According to DeMorgan’s theorem T13: (X . Y)’ = X’ + Y’ NOR Symbols Normal NOR Symbol Alternate NOR Symbol X Y (X + Y)’ X Y X’ . Y’ According to DeMorgan’s theorem T13’: (X + Y)’ = X’ . Y’ Henry Hexmoor

Boolean Algebra number of truth table rows = 2n Literals (n) and terms number of truth table rows = 2n X Y Z Y’Z X+Y’Z 0 0 0 0 0 0 0 1 1 1 0 1 0 0 0 0 1 1 0 0 1 0 0 0 1 1 0 1 1 1 1 1 0 0 1 1 1 1 0 1 See table 2-3 Using demorgan’s laws OR and AND are interchanged… the duality principle Henry Hexmoor

Switching Algebra Axioms & Theorems (A1) X = 0 if X ≠ 1 (A1’) X = 1 if X ≠ 0 (A2) If X = 0, then X’ = 1 (A2’) if X = 1, then, X’ = 0 (A3) 0 . 0 = 0 (A3’) 1 + 1 = 1 (A4) 1 . 1 = 1 (A4’) 0 + 0 = 0 (A5) 0 . 1 = 1 . 0 = 0 (A5’) 1 + 0 = 0 + 1 = 1 (T1) X + 0 = X (T1’) X . 1 = X (Identities) (T2) X + 1 = 1 (T2’) X . 0 = 0 (Null elements) (T3) X + X = X (T3’) X . X = X (Idempotency) (T4) (X’)’ = X (Involution) (T5) X + X’ = 1 (T5’) X . X’ = 0 (Complements) (T6) X + Y = Y + X (T6’) X . Y = Y . X (Commutativity) (T7) (X + Y) + Z = X + (Y + Z) (T7’) (X . Y) . Z = X . (Y . Z) (Associativity) (T8) X . Y + X . Z = X . (Y + Z) (T8’) (X + Y) . (X + Z) = X + Y . Z (Distributivity) (T9) X + X . Y = X (T9’) X . (X + Y) = X (Covering) (T10) X . Y + X . Y’ = X (T10’) (X + Y) . (X + Y’) = X (Combining) (T11) X . Y + X’. Z + Y . Z = X . Y + X’ . Z (T11’) (X + Y) . ( X’ + Z) . (Y + Z) = (X + Y) . (X’ + Z) (Consensus) (T12) X + X + . . . + X = X (T12’) X . X . . . . . X = X (Generalized idempotency) (T13) (X1 . X2 . . . . . Xn)’ = X1’ + X2’ + . . . + Xn’ (T13’) (X1 + X2 + . . . + Xn)’ = X1’ . X2’ . . . . . Xn’ (DeMorgan’s theorems) (T14) [F(X1, X2, . . ., Xn, +, .)]’ = F(X1’, X2’, . . ., Xn’, . , +) (Generalized DeMorgran’s theorem) Henry Hexmoor

Switching Algebra Axioms First two axioms state that a variable X can only take on only one of two values: (A1) X = 0 if X ¹ 1 (A1’) X = 1 if X ¹ 0 Not Axioms, formally define X’ (X prime or NOT X): (A2) If X = 0, then X’ = 1 (A2’) if X = 1, then, X’ = 0 Note: Above axioms are stated in pairs with only difference being the interchange of the symbols 0 and 1. Henry Hexmoor

Three More Switching Algebra Axioms The following three Boolean Algebra axioms state and formally define the AND, OR operations: (A3) 0 . 0 = 0 (A3’) 1 + 1 = 1 (A4) 1 . 1 = 1 (A4’) 0 + 0 = 0 (A5) 0 . 1 = 1 .0 = 0 (A5’) 1 + 0 = 0 + 1 = 1 Axioms A1-A5, A1’-A5’ completely define switching algebra. Henry Hexmoor

Switching Algebra: Single-Variables Theorems Switching-algebra theorems are statements known to be always true (proven using axioms) that allow us to manipulate algebraic logic expressions to allow for simpler analysis. (e.g . X + 0 = X allow us to replace every X +0 with X) The Theorems: (T1-T5, T1’-T5’) (T1) X + 0 = X (T1’) X . 1 = X (Identities) (T2) X + 1 = 1 (T2’) X . 0 = 0 (Null elements) (T3) X + X = X (T3’) X . X = X (Idempotency) (T4) (X’)’ = X (Involution) (T5) X + X’ = 1 (T5’) X . X’ = 0 (Complements) Henry Hexmoor

Perfect Induction Most theorems in switching algebra are simple to prove using perfect induction: Since a switching variable can only take the values 0 and 1 we can prove a theorem involving a single variable X by proving it true for X = 0 and X =1 Example: To prove (T1) X + 0 = X [X = 0] 0 + 0 = 0 true according to axiom A4’ [X = 1] 1 + 0 = 1 true according to axiom A5’ Henry Hexmoor

Switching Algebra: Two- and Three-Variable Theorems (Commutativity) (T6) X + Y = Y + X (T6’) X . Y = Y . X (Associativity) (T7) (X + Y) + Z = X + (Y + Z) (T7’) (X . Y) . Z = X . (Y . Z) T6-T7, T6’ -T7’ are similar to commutative and associative laws for addition and multiplication of integers and reals. Henry Hexmoor

Two- and Three-Variable Theorems (Continued) (Distributivity) (T8) X . Y + X . Z = X . (Y + Z) (T8’) (X + Y) . (X + Z) = X + Y . Z T8 allows to multiply-out an expression to get sum-of-products form (distribute logical multiplication over logical addition): For example: V . (W + X) . (Y + Z) = V .W . Y + V. W. Z + V. X . Y + V. X . Z sum-of-products form T8’ allows to add-out an expression to get a product-of-sums form (distribute logical addition over logical multiplication): (V . W . X) + (Y . Z ) = (V + Y) . (V + Z) . (W + Y) . (W + Z) . (X + Y) . (X + Z) product-of-sums form Henry Hexmoor

Theorem Proof using Truth Table Can use truth table to prove T8 by perfect induction. i.e, Prove that: X . Y + X . Z = X . (Y + Z) (i) Construct truth table for both sides of above equality. x y z y + z x.(y + z) x.y x.z x.y + 1 (ii) Check that from truth table check that that X . Y + X . Z = X . (Y + Z) This is satisfied because output column values for X . Y + X . Z and output column values for X . (Y + Z) are equal for all cases. Henry Hexmoor

Two- and Three-Variable Theorems (Continued) (Covering) (T9) X + X . Y = X (T9’) X . (X + Y) = X (Combining) (T10) X . Y + X . Y’ = X (T10’) (X + Y) . (X + Y’) = X T9-T10 used in the minimization of logic functions. Henry Hexmoor

Two- and Three-Variable Theorems (Continued) (Consensus) (T11) X . Y + X’. Z + Y . Z = X . Y + X’ . Z (T11’) (X + Y) . ( X’ + Z) . (Y + Z) = (X + Y) . (X’ + Z) In T11 the term Y. Z is called the consensus of the term X . Y and the term X’ . Z: If Y . Z = 1, then either X . Y or X’ . Z must also be 1. Thus the term Y . Z is redundant and may be dropped. Henry Hexmoor

n-Variable Theorems (T13), (T13’) are probably the most commonly (Generalized idempotency) (T12) X + X + . . . + X = X (T12’) X . X . . . . . X = X (DeMorgan’s theorems) (T13) (X1 . X2 . . . . . Xn)’ = X1’ + X2’ + . . . + Xn’ (T13’) (X1 + X2 + . . . + Xn)’ = X1’ . X2’ . . . . . Xn’ (T13), (T13’) are probably the most commonly used theorems of switching algebra. Henry Hexmoor

Examples Using DeMorgan’s theorems Example: Equivalence of NAND Gate: A two-input NAND Gate has the output expression Z = (X . Y)’ using (T13) Z = (X . Y)’ = (X’ + Y’) The function of a NAND gate can be achieved with an OR gate with an inverter at each input. Example: Equivalence of NOR Gate A two-input NOR Gate has the output expression Z=(X+Y)’ using (T13’) Z = (X + Y)’ = X’ . Y’ The function of a NOR gate can be achieved with an AND gate with an inverter at each input. Henry Hexmoor

n-Variable Theorems (Continued) (Generalized DeMorgran’s theorem) (T14) [F(X1, X2, . . ., Xn, +, .)]’ = F(X1’, X2’, . . ., Xn’, . , +) States that given any n-variable logic expression its complement can be found by swapping + and . and complementing all variables. Example: F(W,X,Y,Z) = (W’.X) + ( X.Y) + (W.(X’ + Z’)) = ((W)’ . X) + (X. Y) + (W.((X)’ + (Z)’)) [F(W,X,Y,Z)]’ = ((W’)’ + X’) .(X’ + Y’).(W’ + ((X’)’.(Z’)’)) Using T4, (X’)’ = X simplifies it to: [F(W,X,Y,Z)]’ = (W + X’) . (X’ + Y’) . (W’ + (X . Z)) Henry Hexmoor

Logic Function Representation Definitions A literal: is a variable or a complement of a variable Examples: X, Y, X’, Y’ A product term: is a single literal, or a product of two or more literals. Examples: Z’ W.Y.Y X.Y’.Z W’.Y’.Z A sum-of-products expression: is a logical sum of product terms. Example: Z’ + W.X.Y + X.Y’.Z + W’.Y’.Z A sum term: is a single literal or logical sum of two or more literals Examples: Z’ W + X + Y X + Y’ + Z W’ + Y’ + Z A product-of-sums expression: is a logical product of sum terms. Example: Z’. (W + X + Y) . (X + Y’ + Z) . (W’ + Y’ + Z) A normal term: is a product or sum term in which no variable appears more than once Examples of non-normal terms: W.X.X.Y’ W+W+X’+Y X.X’.Y Examples of normal terms: W . X . Y’ W + X’ + Y Henry Hexmoor

Logic Expression Algebraic Manipulation Example Prove that the following identity is true using Algebraic expression Manipulation : (one can also prove it using a truth table) X .Y + X . Z = ((X’ + Y’) . (X’ + Z’))’ Starting from the left hand side of the identity: Let F = X .Y + X . Z A = X . Y B = X . Z Then F = A + B Using DeMorgan’s theorem T 13 on F: F = A + B = (A’ . B’)’ (1) Using DeMorgan’s theorem T 13’ on A, B: A = X . Y = (X’ + Y’)’ (2) B = X . Z = (X’ + Z’)’ (3) Substituting A, B from (2), (3), back in F in (1) gives: F = (A’ . B’)’ = ((X’ + Y’) . (X’ + Z’))’ Which is equal to the right hand side of the identity. Henry Hexmoor

Terminology: Minterms A minterm is a special product of literals, in which each input variable appears exactly once. A function with n variables has 2n minterms (since each variable can appear complemented or not) A three-variable function, such as f(x,y,z), has 23 = 8 minterms: Each minterm is true for exactly one combination of inputs: x’y’z’ x’y’z x’yz’ x’yz xy’z’ xy’z xyz’ xyz Minterm Is true when… Shorthand x’y’z’ x=0, y=0, z=0 m0 x’y’z x=0, y=0, z=1 m1 x’yz’ x=0, y=1, z=0 m2 x’yz x=0, y=1, z=1 m3 xy’z’ x=1, y=0, z=0 m4 xy’z x=1, y=0, z=1 m5 xyz’ x=1, y=1, z=0 m6 xyz x=1, y=1, z=1 m7 Henry Hexmoor

Terminology: Maxterms A maxterm is a special sum of literals, in which each input variable appears exactly once. A function with n variables has 2n maxterms (since each variable can appear complemented or not) A three-variable function, such as f(x,y,z), has 23 = 8 maxterms: Maxterm Shorthand x’+ y’+ z’ M0 x’+ y’ + z M1 x’+ y + z’ M2 x’ + y + z M3 x + y’ + z’ M4 x + y’ + z M5 x + y + z’ M6 x + y + z M7 Henry Hexmoor

Canonical Forms Minterms and Maxterms Index Representation of Minterms and Maxterms Sum-of-Minterm (SOM) Representations Product-of-Maxterm (POM) Representations Representation of Complements of Functions Conversions between Representations Henry Hexmoor

Logic Function Representation Definitions Minterm An n-variable minterm is a normal product term with n literals. There are 2n such products terms. Example of 4-variable minterms: W.X’.Y’.Z’ W.X.Y’.Z W’.X’.Y.Z’ Maxterm An n-variable maxterm is a normal sum term with n literals. There are 2n such sum terms. Examples of 4-variable maxterms: W’ + X’ + Y + Z’ W + X’ + Y’ + Z W’ + X’ + Y + Z A minterm can be defined as as product term that is 1 in exactly one row of the truth table. A maxterm can similarly be defined as a sum term that is 0 in exactly one row in the truth table. Henry Hexmoor

Minterms/Maxterms for A 3-variable function F(X,Y,Z) Row X Y Z F Minterm Maxterm 0 0 0 0 F(0,0,0) X’.Y’.Z’ X + Y + Z 1 0 0 1 F(0,0,1) X’.Y’.Z X + Y + Z’ 2 0 1 0 F(0,1,0) X’.Y.Z’ X + Y’ + Z 3 0 1 1 F(0,1,1) X’.Y.Z X + Y’ + Z’ 4 1 0 0 F(1,0,0) X.Y’.Z’ X’ + Y + Z 5 1 0 1 F(1,0,1) X.Y’.Z X’ + Y + Z’ 6 1 1 0 F(1,1,0) X.Y.Z’ X’ + Y’ + Z 7 1 1 1 F(1,1,1) X.Y.Z X’ + Y’ + Z’ Henry Hexmoor

Canonical Sum Example The function represented by the truth table: has the canonical sum representation: F = S X,Y,Z m(0, 3, 4, 6, 7) = X’.Y’.Z’ + X’.Y.Z + X.Y’.Z’ + X.Y’.Z’ + X.Y.Z Row X Y Z F 0 0 0 0 1 1 0 0 1 0 2 0 1 0 0 3 0 1 1 1 4 1 0 0 1 5 1 0 1 0 6 1 1 0 1 7 1 1 1 1 Minterm list using S notation Algebraic canonical sum of minterms Henry Hexmoor

Canonical Product Example The function represented by the truth table: has the canonical product representation: F = P X,Y,Z M(1,2,5) = (X + Y + Z’) . (X + Y’ + Z) . (X’ + Y + Z’) Row X Y Z F 0 0 0 0 1 1 0 0 1 0 2 0 1 0 0 3 0 1 1 1 4 1 0 0 1 5 1 0 1 0 6 1 1 0 1 7 1 1 1 1 Henry Hexmoor

Minterm and Maxterm Relationship Review: DeMorgan's Theorem and Two-variable example: M2 is the complement of m2 and vice-versa. Since DeMorgan's Theorem holds for n variables, the above holds for terms of n variables giving: Thus Mi is the complement of mi. x · y = x + y x + y = x × y M = x + y m = x· y 2 2 i m M = Henry Hexmoor

Conversion Between Minterm/Maxterm Lists To convert between a minterm list and a maxterm list take the set complement. Example (page 44, 3rd ed.): F’(X,Y, Z) = S m(1,3, 4, 6) = m1 + m3 + m4 + m6 F(X,Y, Z) = P M(1,3,4,6) = M1M3M4M6 Henry Hexmoor

Verbal Synthesis Example: An Alarm Circuit A verbal logic description: The ALARM output is 1 if the panic input is 1, or if the ENABLE input is 1, the EXISTING input is 0, and the house is not secure. The house is secure if the WINDOW, DOOR, GARAGE inputs are all 1 This can be put in logic expressions as follows: ALARM = PANIC + ENABLE . EXISTING’ . SECURE’ SECURE = WINDOW. DOOR. GARAGE ALARM = PANIC + ENABLE . EXISTING’. (WINDOW . DOOR . GARAGE)’ In sum of products form as (by using DeMorgan T13 and multiplying out) : ALARM = PANIC + ENABLE. EXISTING’ . WINDOW’ + ENABLE . EXISTING’. DOOR’+ ENABLE. EXISTING’. GARAGE’ Henry Hexmoor

cost criteria 2-4 OR Gate Literal cost Gate input cost: literals + terms OR Gate Henry Hexmoor

Combinational Circuit Minimization Canonical sum and product logic expressions do not provide a circuit realization with the minimum number of gates. Minimization methods reduce the cost of two level AND-OR, NAND-NAND, OR-AND, NOR-NOR circuits in three ways: By minimizing the number of first level gates By minimizing the number of inputs of each first-level gate. Minimizing the inputs of the second level gate Most minimization methods are based on the combining theorems T10, T10’: Henry Hexmoor

Karnaugh Maps A Karnaugh Map or (K-map for short) is a graphical representation of the truth table of a logic function. The K-map for an n-input logic function is an array with 2n cells or squares, one for each input combination or minterm. The rows and columns are labeled so that the input combination for any cell is determined from the row and column headings. The row and columns of the map are ordered in such a way that each cell differs from an adjacent cell in only one input variable: Thus for an n-variable K-map, each cell has n adjacent cells. The K-map for a function is filled by putting: a ‘1’ in the square corresponding to a minterm a ‘0’ otherwise (maybe omitted) Henry Hexmoor

2-Variable K-map Truth Table: K-map Truth Table: K-map For a 2-variable logic function F(X,Y): Truth Table: X Y 0 1 1 2 3 Row X Y F Minterm 0 0 0 F(0,0) X’.Y’ 1 0 1 F(0,1) X’.Y 2 1 0 F(1,0) X.Y’ 3 1 1 F(1,1) X .Y K-map Example: For the function F(X,Y) = S X,Y m(1,2,3) Truth Table: K-map X Y 0 1 1 2 3 Row X Y F 0 0 0 0 1 0 1 1 2 1 0 1 3 1 1 1 1 1 1 Henry Hexmoor

3 variable Karnaugh map Textbook convention YZ 00 01 11 10 1 X X’ Y Z’ X’ Y Z X’ Y Z X’ Y Z XY’ Z’ X Y’Z X Y Z X Y Z’ Henry Hexmoor

3-Variable K-map For a 3-variable logic function F(X,Y,Z): Truth Table: K-map Row X Y Z F Minterm 0 0 0 0 F(0,0,0) X’.Y’.Z’ 1 0 0 1 F(0,0,1) X’.Y’.Z 2 0 1 0 F(0,1,0) X’.Y.Z’ 3 0 1 1 F(0,1,1) X’.Y.Z 4 1 0 0 F(1,0,0) X.Y’.Z’ 5 1 0 1 F(1,0,1) X.Y’.Z 6 1 1 0 F(1,1,0) X.Y.Z’ 7 1 1 1 F(1,1,1) X.Y.Z X Y 1 00 01 11 10 YZ 2 3 6 7 4 5 Example: For the function F(X,Y,Z) = S X,Y,Z (1,4,6,7) X Y 1 00 01 11 10 Z YZ 2 3 6 7 4 5 K-map Row X Y Z F 0 0 0 0 0 1 0 0 1 1 2 0 1 0 0 3 0 1 1 0 4 1 0 0 1 5 1 0 1 0 6 1 1 0 1 7 1 1 1 1 1 Truth Table: 1 1 1 Henry Hexmoor

4-Variable K-map Truth Table: K-map For a 4-variable logic function F(W,X,Y,Z): Truth Table: K-map W Y 00 01 11 10 00 01 11 10 Z WX YZ X 1 3 2 4 5 7 6 12 13 15 14 8 9 Row W X Y Z F Minterm 0 0 0 0 0 F(0,0,0,0) W’.X’.Y’.Z’ 1 0 0 0 1 F(0,0,0,1) W’. X’.Y’.Z 2 0 0 1 0 F(0,0,1,0) W’. X’.Y.Z’ 3 0 0 1 1 F(0,0,1,1) W’. X’.Y.Z 4 0 1 0 0 F(0,1,0,0) W’. X.Y’.Z’ 5 0 1 0 1 F(0,1,0,1) W’.X.Y’.Z 6 0 1 1 0 F(0,1,1,0) W’.X.Y.Z’ 7 0 1 1 1 F(0,1,1,1) W’.X.Y.Z 8 1 0 0 0 F(1,0,0,0) W.X’.Y’.Z’ 9 1 0 0 1 F(1,0,0,1) W.X’.Y’.Z 10 1 0 1 0 F(1,0,1,0) W.X’.Y.Z’ 11 1 0 1 1 F(1,0,1,1) W.X’.Y.Z 12 1 1 0 0 F(1,1,0,0) W.X.Y’.Z’ 13 1 1 0 1 F(1,1,0,1) W.X.Y’.Z 14 1 1 1 0 F(1,1,1,0) W.X.Y.Z’ 15 1 1 1 1 F(1,1,1,1) W.X.Y.Z Henry Hexmoor

Minimization Using K-maps Group or combine as many adjacent 1-cells as possible: The larger the group is, the fewer the number of literals in the resulting product term. Grouping 2 adjacent 1-cells eliminates 1 variable, grouping 4 1-cells eliminates 2 variables, grouping 8 1-cells eliminates 3 variables, and so on. In general, grouping 2n squares eliminates n variables. Select as few groups as possible to cover all the 1-cells (minterms) of the function: The fewer the groups, the fewer the number of product terms in the minimized function. Henry Hexmoor

Karnaugh maps Example 2-4 (Figure 2-14b, page 54, 3rd ed.) 000 100 010 110 1cell Square overlap is OK. Z’ YZ 00 01 11 10 1 X 1 1 1 1 1 XY’ 100 101 F2(X,Y,Z) = m(0,2,4,5,6) = Z’ + XY’ Henry Hexmoor

4 variable Karnaugh map example 2-5 (Figure 2-19, page 57, 3rd ed.) YZ 00 01 11 10 0000 0001 1100 1101 1000 1001 0000 0001 0100 0101 0010 0110 00 01 11 10 1 0100 1100 0110 1110 1 1 1 1 WX 1 1 1 1 1 1 F(W,X,Y,Z) = S m(0,1,2,4,5,5,8,9,12,13,14) = Y’ + W’Z’ + XZ’ Henry Hexmoor

prime/essential implicants W’Z’ and XZ’ are prime implicants (each rectangle needs all its cells) Y’ is an essential prime implicant… (the rectangle contains exclusive (i.e., nonshared) cells YZ 00 01 11 10 00 01 11 10 1 1 1 1 1 WX 1 1 1 1 1 1 F(X,Y,Z) = m(0,1,2,4,5,5,8,9,12,13,14) = Y’ + W’Z’ + XZ’ Selection rule: minimize overlap among prime implicants Henry Hexmoor

product of sums: Maxterms YZ 00 01 11 10 00 01 11 10 1 1 1 1 1 WX 1 1 1 1 1 1 F(X,Y,Z) = m(0,1,2,4,5,5,8,9,12,13,14) = YZ + WX’Y  (Y’ + Z’) (W’ + X + Y) Selection rule: minimize overlap among prime implicants Henry Hexmoor

More Examples… x’z + y’z + xyz’. x’z’ + xy’z Henry Hexmoor

multilevel optimization 2-6 Manipulate equations algebraically G = AC’E + AC’F + AD’E + AD’F + BCDE’F’ = A (C’E + C’F + D’E + D’F) + BCDE’F’ = A (C’ + D’)(E + F) + BCDE’F’ OR Gate Henry Hexmoor

other gate types OR Gate See figures 2-22 and 2-23 in 4th edition Henry Hexmoor

HW 2 Demonstrate by means of truth tables the validity of the following identity: (XYZ)’ = X’ + Y’ + Z’ (Q 2-1) 2. Optimize the following Boolean function by means a three-variable map: F(X,Y,Z) = Sm(1,3,6,7) (Q 2-14) OR Gate Henry Hexmoor