Beyond TCAMs: An SRAM-based Parallel Multi-Pipeline Architecture for Terabit IP Lookup Author: Weirong Jiang ViktorK.Prasanna Publisher: Infocom 08 Present:

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Presentation transcript:

Beyond TCAMs: An SRAM-based Parallel Multi-Pipeline Architecture for Terabit IP Lookup Author: Weirong Jiang ViktorK.Prasanna Publisher: Infocom 08 Present: Yen-Cheng Liu, 6/3

Outline POLP ARCHITECTURE OVERVIEW Experiment result

Architecture

Trie partition A larger number of sub-trie will help the balance across the pipeline. Mean larger initial stride Prefix expansion may result in prefix duplication in different pipe Care should be taken to decide the initial stride

Trie partition

Sub-trie to pipeline mapping

Mapping node to stage

Skip-enabling in the pipeline To support the flexible mapping, nop is applied. The method is: Two fields are needed to implement Store the child node address. Store the distance to the pipeline stage

Traffic balancing Pipelined prefix caching Least Recently Used (LRU) algorithm At most 2 bubbles to complete cache update

Traffic balancing

Experimental result