Slide 1Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder CMS Module Testing Issues From a CDF Testing Experience Perspective Anthony Affolder (for the UCSB module testing group)

Slide 2Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Talk Overview Review current CMS testing procedures Assorted observations from limited testing experience on CMS components UCSB module testing à Personnel, equipment, and infrastructure

Slide 3Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder CMS Testing Overview Review of current CMS testing procedures à Ensure understanding of testing prior to arrival at FNAL/UCSB –Reproduction of hybrid tests on arrival à Make sure any systematic failures in production techniques/materials found as early as possible –M800 pre-production first chance to produce large quantities (>10) of single type of modules –Need to be able to track time development of faults Answer open questions before large scale production à Need of burn-in of module/optical systems components à Finalization of production procedure à Finalization of testing procedure –Both fault finding and module qualification

Slide 4Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Tests Prior to Arrival at FNAL/UCSB(1) APV Chip Testing (1 minute) à Voltage stressing –1.5  V DD (5 s) –2.0  V DD (1 s) à Basic Functionality –MUX gain –Current Measurement à Pedestal –50-90 ADC à Gain (Single Point) –G > 20 ADC –|G AVE -G chan |<15 ADC à Pipeline –  cell < 2 ADC –|P-P cell |< 5 ADC FHIT-Industrial Tester (1 minute) à Connectivity à Basic Functionality –MUX gain –DCU calibration –Current measurement à Pedestal –20% Cut à Noise –???% Cut à Gain (Single Point) –20% Cut

Slide 5Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Tests Prior to Arrival at FNAL/UCSB(2) Strasburg à ????? CERN-Pitch adaptor bonding (~20 minutes) à Basic functionality à Pedestal –20% Cut à Noise –20% Cut à Gain (Single Point) –20% Cut à Capacitive pitch adaptor pulsing à Thermal cycle to –20 C –Repeat test à Warm to room temperature –Repeat test

Slide 6Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Testing Concerns Hybrid tested ~1-20 minutes prior to arrival at FNAL/UCSB à Leads to concern about infant mortality problems of hybrid components à CDF Hybrid Burn-in Experience –4 days with extensive tests at start/end –~9 out of 8000 chips failed (0.1% of chips) –Same rate would lead to 2%(5%) rework of rods Different chips so can’t expect same rate Optical hybrids also will not be burnt-in à CDF optical hybrid experience –3 day burn-in with tests at beginning and end –~10% failed during burn-in –Additional 9 DOIM (out of 556) failed during data-taking –CDF used custom laser diode system Lack of burn-in would have been catastrophic

Slide 7Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Testing Concerns (2) Some components of hybrid characterization missing à Calibration circuit only tested at one injection point à Pipeline pedestal/noise not tested adequately –CDF calibrations remove bad cells from noise/pedestal calculation à Suggest such test done prior to pitch adaptor bonding Testing requirements not consistent between sites à Pedestal requirement change between test stands à On-chip common mode subtraction “feature” makes noise characteristics of open/saturated channels unpredictable à Common-mode subtraction also different between stands Recent hybrid circuit modifications change LED pinhole tests results

Slide 8Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Common-mode Subtraction Differing algorithms used to calculate common mode pedestal for subtraction à ARC –4 groups of 32 channels per chip –Use average as common mode for each section à DAQ –Strips (after subtracting the channel’s average pedestal) are ordered with highest/lowest 10% truncated –Use average of remaining strip as common mode for chip à Final FED –Median channel value (after pedestal subtraction) is used as common mode Use of same algorithms will yield more uniform testing/qualification results between stands

Slide 9Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Test System Grounding Issues PC, DAQ/ARC, LV supplies, and HV supply share common ground à Leads to less than predictable test results –See frequency related noise of prototype rod tests (D. Abbaneo) Suggest that a common mode noise standard is made à With inverter off in peak mode (  0.5 ADC) –Removes on-chip common mode “feature” à Allows for more uniform testing results

Slide 10Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Lower Noise Requirements Sensor-Sensor Open Visible Improving grounding until common mode noise less than ~0.5 ADC in peak mode/ inverter off allows the use of raw noise as a powerful tool for finding opens, including the location Sensor-Sensor Pitch Adaptor-Sensor APV-Pitch Adaptor (???) Seen by Charge Injection Zoom in

Slide 11Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Pedestal Tests (Current) Wafer Probing à Dynamic Range: ADC à Average Pedestal: 67.1 –50 <P < 90 ADC Cut FHIT (Industrial Tester) à Dynamic Range:0-240 ADC à Average Pedestal:~90 –±20% Cut:~72<P<108 ARC à Dynamic Range:0-240 ADC à Average Pedestal:~110 –±20% Cut:~88<P<132 DAQ à Dynamic Range: ADC à Average Pedestal:~170 –±20% Cut:~146<P<194 Pedestal Requirement vary by as much as 70%

Slide 12Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Suggested Pedestal Tests As FED subtracts average pedestals per channel, pedestal variation only effects dynamic range of channel’s pre-amp or may indicate pathological problem à Define pedestal requirements in similar manner as in wafer probing –Define absolute pedestal requirements with a given width with different mean for each test stand dependent

Slide 13Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Upper Noise Requirements High noise only affects signal efficiency (clustering) Use physics (radioactive sources/collision data) to determine cut value à Expect values to be different for different systems Wider Cut Values SVX

Slide 14Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Gain Measurements Extreme cases seen: Convolution of front-end w/ calibration circuit Single point gain does not tell full story Is there a physics based gain spec? Zero point offset Low gain High gain Gain=-28.3 ADC/MIP Gain=-31.5 ADC/MIP

Slide 15Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Gain Measurements (2) Multi-point gain measurements have many advantages à More stable à More uniform between chips –Tighter Cuts à Shows non-linearities –Zero MIP injection à Shows non-uniformities within chip à Calibration very sensitive to environment Gain Scan ( MIP) (2 MIP injected)/2 TOB Module 83 TOB Hybrid

Slide 16Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder LED pinhole test characteristics will change with bias return line modification  Resistance on hybrid (22k ,100  )  (2.2k ,683  ) R(22 k  ) LED Pinhole Test

Slide 17Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Bias Ring Voltage Voltage conversion assumes old resistor values in bias return circuit (22K ,100  With new resistor values (2.2K , 681  need ~120  A for regular pinholes need >300  A for “high current” pinholes New Leakage Current (  A) Necessary With New Resistor Values LED Pinhole Tests  May cause damage to sensors!!! (Torsten Franke)

Slide 18Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Noise Chip Edge Wings Increase in noise at chip edges à But only in a few pipeline cells à pipeline scan=latency scan In-time interference effect!! à Fairly easy to reduce/avoid

Slide 19Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Deadtimeless Scan (ISL) Issue two triggers with varying time separation à Measure pedestal and noise at each unit of trigger separation With ISL, every command, chip change of state, and data readout caused pedestal shifts à Would guess similar effect causing wing Removed with DPS at CDF (Time Between Triggers)

Slide 20Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Suggestions for Improved Test model Add hybrid qualification prior to pitch adaptor bonding à Thorough understanding of hybrids by adding more pipeline and gain measurements Make requirements/calculation algorithms consistent through testing process à Wafer Probing  FHIT  Strasburg  Pitch Adaptor Bonding  Module Construction  Rod Construction/burn-in –Allows for the reproduction of bad channel lists –Eases tracking of fault creation Motivate requirements for fault finding and on silicon tracker performance à Noise Occupancy à Signal Efficiency à Signal Resolution

Slide 21Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Test model(2) Improve system’s noise performance in order to use the noise as powerful tool à Identification of location of opens w/o LED test Modify deep tests à Suggest different bad channel cuts specific to component type tested à Remove all percentage requirements (relative to average) à Replace with fixed requirements Use cooling box as module burn-in until shown unnecessary à Reduces reworking during rod assembly à Adds important information about necessity of LED tests for the finding of some pinholes and opens locations à Demonstrates if hybrid burn-in necessary

Slide 22Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder CDF Module Burn-in Experience Significant number of pinholes created during burn-in (even after 5 hours running) à L % of strips à L % of strips à L % of strips à ISL % of strips 7 additional pinholes created during data-taken à L7 burnt-in at depletion voltage –All other burnt in with 50% over-voltage Early module burn-in in CMS will indicate pinhole creation rate and its effect on rod rework rate

Slide 23Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Possible Rod Burn-in Issues LED systems seem necessary for discovery of “high current” pinholes and location of opens à In current rod burn-in plan, no LED systems available à Necessitates new techniques to locate “high current” pinholes and opens –New sensor qualification tests, backplane pulsing, lower common mode noise, etc. Initial module burn-in will determine if this is an issue

Slide 24Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder CLEO pinholes CLEO Sensor Testing (C. Campagnari) à Bias applied across coupling capacitor with no bias between p + and n + implants à Asymmetric response to bias by pinholes (like a diode) Appears similar to “high current” pinholes à “High current” pinholed channels shown act saturated only after bias polarity changes across coupling capacitor Bias Voltage (Volts) Leakage Current(Amps)

Slide 25Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Testing Conclusions Slight modification of testing program would lead to more uniform and consistent fault finding between different sites/systems à Reduce rework performed on completed rods Location of opens could be identified by combination of noise and internal calibration measurements à Useful for rod burn-in fault finding Modification of HV return circuit necessitates increase of LED intensity in pinhole search à “High current” pinholes may be able to be found with modification of sensor qualification Increase in noise at chip edges likely due to in-time interference effects à We would be willing to study this more thoroughly We are willing to help in defining testing plan/devising tests

Slide 26Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder UCSB Short-term Testing Plan Characterize hybrid (+PA) on arrival à Basic functionality, gain scan, and deep test (ARC) Re-characterize module on completion of construction à Basic functionality, gain scan, deep test, and IV curves (ARC) Cold box test fraction of modules (DAQ) à Acts as ~24 hour module burn-in –Identifies mechanical/bond/electrical weaknesses prior to production of large number of modules –Reduces reworking of rod/retrofitting of modules Rod construction/characterization/burn-in (when parts and test setups available)

Slide 27Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Testing personnel at UCSB Professors à Joe Incandela à Claudio Campagnari à David Stuart Post-docs à Anthony Affolder à Patrick Gartung (UC-Riverside) Graduate Students à Steve Levy à Shawn Stromburg à +1-2 starting this summer Electrical Engineering Support à Sam Burke ESE Master Student à Anuroop Gupta (Database/programming) + Assorted Undergraduates and Techs (during full production)

Slide 28Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Current UCSB Testing Setup Clamshell(UCSB) à Plastic stand-offs –2 Locating Pins à Kapton Extension Cables(UCSB) –Easy connection/disconnection à Solid mounting of DAQ equipment 1 ARC Controller + 1 ARC FE LV & HV Power Supplies Dry Air Clamshell

Slide 29Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Testing Facilities High Bay (Ground floor) à Rod assembly/burn-in à Convenient access to loading dock Clean Room (5 th floor Physics) à Adjacent to production area à Module tests –Fault finding and deep tests à Module burn-in station à Visual inspection table

Slide 30Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Safety Protocols LV à OVP,OCP HV à Crowbar Protection Electrostatic Protection à Ground mats on tables and floors à Heel straps à Combo tester at clean room entrance à Touch tester at each station (Artist Rendition)

Slide 31Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Test System Grounding Issues (2) Module Testing Final PS System PC LV -5V ARC Controller HV +HV Sensor Hybrid ARC FE 2.5V 1.25V GROUND LOOPS!!! LV HV +HV Sensor Hybrid HVGND GND +1.25V +2.5V DOH AOH Command And Data Cable Optical Cables Patch Panel/ Interconnect Bus

Slide 32Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Hybrid Gain Measurement(1) Hybrid Tests on steel plate  Large pickup effects cause large  2 when 0 MIP point included   2 fairly good when excluding zero –Noise of calibration circuit not yet included 0-3 MIPs0.5-3 MIPs

Slide 33Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Hybrid Gain Measurement(2) Hybrid Tests in ESD box à Pickup effects greatly reduced à Large variation gain (±5%) variation in third chip Calibration tests have strong dependence on environment/grounding!!!! 0-3 MIPs0.5-3 MIPs

Slide 34Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Other Suggestions Central Repository of Schematics à Electrical and mechanical schematic of all components used in the manufacturing and testing of all silicon tracker components à All in a standard format (pdf ??) readable by a standard viewer (abode acrobat version x.y ??) –UCSB willing to start such a repository List of all components with responsible people indicated à With and web page information Central Repository of Production Checklist à Enables fast determination of procedures done previous to arrival to given site

Slide 35Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder Example of DAQ/ARC Differences

Slide 36Module Testing Meeting Jan. 29, 2002CMS Module Testing Issues-Anthony Affolder On-chip common mode subtraction Inverters share common point à Current flows between channels Regular channel noise:   2  raw 2 -  cm 2 Opens/saturated channel noise:   2  raw 2 +  cm 2 Depending on  cm, open channel have higher/lower noise