1 INTAS Meeting, Moscow Tools for Verification of Specification Given by Basic Protocols Oleksandr Letychevskyi, Ph.D. Glushkov Institute of Cybernetics.

Slides:



Advertisements
Similar presentations
1 Verification by Model Checking. 2 Part 1 : Motivation.
Advertisements

Information Software Systems 18 May 2007 Information Software Systems ISS Modern SW Development Practices: Processes and Technologies 18 May 2007 (c) 2007.
Auto-Generation of Test Cases for Infinite States Reactive Systems Based on Symbolic Execution and Formula Rewriting Donghuo Chen School of Computer Science.
An Abstract Interpretation Framework for Refactoring P. Cousot, NYU, ENS, CNRS, INRIA R. Cousot, ENS, CNRS, INRIA F. Logozzo, M. Barnett, Microsoft Research.
CS 267: Automated Verification Lecture 8: Automata Theoretic Model Checking Instructor: Tevfik Bultan.
Introducing Formal Methods, Module 1, Version 1.1, Oct., Formal Specification and Analytical Verification L 5.
Abstraction and Modular Reasoning for the Verification of Software Corina Pasareanu NASA Ames Research Center.
Rigorous Software Development CSCI-GA Instructor: Thomas Wies Spring 2012 Lecture 13.
Verification of Hybrid Systems An Assessment of Current Techniques Holly Bowen.
August Moscow meeting1August Moscow meeting1August Moscow meeting11 Deductive tools in insertion modeling verification A.Letichevsky.
1 Concurrency Specification. 2 Outline 4 Issues in concurrent systems 4 Programming language support for concurrency 4 Concurrency analysis - A specification.
1 Semantic Description of Programming languages. 2 Static versus Dynamic Semantics n Static Semantics represents legal forms of programs that cannot be.
CS 355 – Programming Languages
Automated creation of verification models for C-programs Yury Yusupov Saint-Petersburg State Polytechnic University The Second Spring Young Researchers.
Leveraging Assertion Based Verification by using Magellan Michal Cayzer.
Course Summary. © Katz, 2003 Formal Specifications of Complex Systems-- Real-time 2 Topics (1) Families of specification methods, evaluation criteria.
Model Checking. Used in studying behaviors of reactive systems Typically involves three steps: Create a finite state model (FSM) of the system design.
ECE Synthesis & Verification1 ECE 667 Spring 2011 Synthesis and Verification of Digital Systems Verification Introduction.
CS 330 Programming Languages 09 / 18 / 2007 Instructor: Michael Eckmann.
Transaction Ordering Verification using Trace Inclusion Refinement Mike Jones 11 January 2000.
Course Summary. © Katz, 2007 Formal Specifications of Complex Systems-- Real-time 2 Topics (1) Families of specification methods, evaluation criteria.
Probabilistic Verification of Discrete Event Systems Håkan L. S. Younes.
Counterexample Guided Invariant Discovery for Parameterized Cache Coherence Verification Sudhindra Pandav Konrad Slind Ganesh Gopalakrishnan.
CS 267: Automated Verification Lecture 13: Bounded Model Checking Instructor: Tevfik Bultan.
Formal verification Marco A. Peña Universitat Politècnica de Catalunya.
© Katz, 2003 Formal Specifications of Complex Systems-- Real-time 1 Adding Real-time to Formal Specifications Formal Specifications of Complex Systems.
MCA –Software Engineering Kantipur City College. Topics include  Formal Methods Concept  Formal Specification Language Test plan creation Test-case.
By D. Beyer et. al. Simon Fraser University (Spring 09) Presentation By: Pashootan Vaezipoor.
Verification technique on SA applications using Incremental Model Checking 컴퓨터학과 신영주.
Formal Methods 1. Software Engineering and Formal Methods  Every software engineering methodology is based on a recommended development process  proceeding.
Cheng/Dillon-Software Engineering: Formal Methods Model Checking.
Introduction to Software Testing Chapter 9.4 Model-Based Grammars Paul Ammann & Jeff Offutt
TEST SUITE DEVELOPMENT FOR CONFORMANCE TESTING OF PROTOCOLS Anastasia Tugaenko Scientific Adviser: Nikolay Pakulin, PhD Institute for System Programming.
Balancing Practices: Inspections, Testing, and Others JAXA scenario (formal method) Masa Katahira Japanese Space Agency.
Topics Covered: Software requirement specification(SRS) Software requirement specification(SRS) Authors of SRS Authors of SRS Need of SRS Need of SRS.
Software Engineering Prof. Dr. Bertrand Meyer March 2007 – June 2007 Chair of Software Engineering Static program checking and verification Slides: Based.
Testing Generation at UPenn Model-Based Test Generation I. Model-based test generation for discrete systems [HLS02]. Temp. Prop. Translator Controller.
Verification and Test Automation of UML Projects Nikita Voinov, Vsevolod Kotlyarov (Saint-Petersburg State Polytechnic University) The Third Spring Young.
Scientific Computing By: Fatima Hallak To: Dr. Guy Tel-Zur.
Framework for the Development and Testing of Dependable and Safety-Critical Systems IKTA 065/ Supported by the Information and Communication.
Dynamic Analysis of Multithreaded Java Programs Dr. Abhik Roychoudhury National University of Singapore.
Semi-automatic Property Generation for the Formal Verification of a Satellite On-board System Wesley Gonçalves Silva.
Institute for Telematics University of Lübeck, Germany M. Ebner, M. Schmitt, J. Grabowski Test Generation with Autolink and TestComposer.
CS 363 Comparative Programming Languages Semantics.
1 Qualitative Reasoning of Distributed Object Design Nima Kaveh & Wolfgang Emmerich Software Systems Engineering Dept. Computer Science University College.
ISBN Chapter 3 Describing Semantics.
Chapter 3 Part II Describing Syntax and Semantics.
SDS Foil no 1 V&V&S Verification, Validation and Synthesis: doing away with defects Verification, Validation and Synthesis: doing away with defects.
Formal Methods.
Xiaosong Lu Togashi Laboratory Department of Computer Science Shizuoka University April 1999 Specification and Verification of Hierarchical Reactive Systems.
HACNet Simulation-based Validation of Security Protocols Vinay Venkataraghavan Advisors: S.Nair, P.-M. Seidel HACNet Lab Computer Science and Engineering.
CSCI1600: Embedded and Real Time Software Lecture 11: Modeling IV: Concurrency Steven Reiss, Fall 2015.
Ukrprog Formal requirement language and its applications A.Letichevsky Glushkov Institute of Cybernetics.
UniTesK Test Suite Architecture Igor Bourdonov Alexander Kossatchev Victor Kuliamin Alexander Petrenko.
Properties Incompleteness Evaluation by Functional Verification IEEE TRANSACTIONS ON COMPUTERS, VOL. 56, NO. 4, APRIL
SAT-Based Model Checking Without Unrolling Aaron R. Bradley.
Static Techniques for V&V. Hierarchy of V&V techniques Static Analysis V&V Dynamic Techniques Model Checking Simulation Symbolic Execution Testing Informal.
Extended Static Checking for Java Cormac Flanagan Joint work with: Rustan Leino, Mark Lillibridge, Greg Nelson, Jim Saxe, and Raymie Stata Compaq Systems.
Winter 2007SEG2101 Chapter 121 Chapter 12 Verification and Validation.
Chapter 3: The Requirements Workflow [Arlow and Neustadt, 2005] CS 426 Senior Projects in Computer Science University of Nevada, Reno Department of Computer.
Инсерционное моделирование А.Летичевский Семинар «Образный компьютер» 10 Мая 2011.
UniTesK Test Suite Architecture Igor Bourdonov Alexander Kossatchev Victor Kuliamin Alexander Petrenko.
September 1999Compaq Computer CorporationSlide 1 of 16 Verification of cache-coherence protocols with TLA+ Homayoon Akhiani, Damien Doligez, Paul Harter,
1 Requirements Engineering From System Goals to UML Models to Software Specifications Axel Van Lamsweerde.
Presentation Title 2/4/2018 Software Verification using Predicate Abstraction and Iterative Refinement: Part Bug Catching: Automated Program Verification.
Sandeep Patil, Sayantan Bhadra, Valeriy Vyatkin
Mathematical Structures for Computer Science Chapter 1
Automated Extraction of Inductive Invariants to Aid Model Checking
Scalability in Model Checking
Predicate Abstraction
Presentation transcript:

1 INTAS Meeting, Moscow Tools for Verification of Specification Given by Basic Protocols Oleksandr Letychevskyi, Ph.D. Glushkov Institute of Cybernetics of Ukrainan Academy of Sciences Telephone: +38(044)

2 INTAS Meeting, Moscow 28-Aug-07 VRS Tools Algebraic Programming System Verification of Requirements System (academic version) Verification of Requirements System (business version) Client Client (academic version)

3 INTAS Meeting, Moscow 28-Aug-07 Basic Protocols – Input of Verification System I1I2 S R Process Precondition Postcondition Basic protocol in MSC form  x S(x)->A(x). R(x) Action A will be performed if S is true and then condition R will be true after A

4 INTAS Meeting, Moscow 28-Aug-07 Example of industrial formalization

5 INTAS Meeting, Moscow 28-Aug-07 Wimax ( protocol) specifications are very close to basic protocols and could be converted easily Basic protocol format Transition system specifications Environment description Formalization of Wimax requirements

6 INTAS Meeting, Moscow 28-Aug-07 Some basic protocols for protocol

7 INTAS Meeting, Moscow 28-Aug-07 Basic Protocols Technology Concrete Trace Generator Symbolic Trace Generator Static Requirements Checker Formalized requirements Verdict, set of traces

8 INTAS Meeting, Moscow 28-Aug-07 Concrete Simulation  Concrete Trace Generator (CTG) simulates system behavior which is restricted by set of basic protocols and filters.  Simulation is performed by checking of PRE conditions and applying POST conditions.  During simulation CTG detects deadlocks, non-determinisms, safety violations, unreachable requirements, usage of uninitialized attributes and admitted region attribute overflow.  CTG generates counterexamples for detected inconsistencies and set of traces correspondingly to filter settings.

9 INTAS Meeting, Moscow 28-Aug-07 Symbolic Generation  Symbolic Trace Generator (STG) simulates set of basic protocol by applying of possible protocols that present behavior of system without computing of concrete environment state.  Simulation is performed by proving of existing of solution of formula in PRE-condition. If solution does not exist – the corresponded counterexample with symbolic values will be presented.  During simulation STG shall detect deadlocks, safety violations, and non-determinisms without initial values of attributes.  STG shall generate counterexamples by means of backward generation for inconsistencies that were detected by static requirements checking. These inconsistencies may be not reached by concrete trace generation.

10 INTAS Meeting, Moscow 28-Aug-07 Common Scheme of Symbolic Modeling Environment Description Set of Basic Protocol Initial State of Environment Safety Condition Checking of Basic Protocol ApplicabilityProving Machine If applicable: Change State of Environment Selection of Basic Protocol If not applicable Checking of Properties (safety, reachability) Trace Creating New Trace Set of Traces Verdict

11 INTAS Meeting, Moscow 28-Aug-07 Backward Trace Generation Initial state Inconsistency or safety violation Initial state Inconsistency or safety violation Inconsistency or incompleteness could be unreachable by means of direct trace generation If we’ll use backward trace generation we could reach initial state by means of deductive tools

12 INTAS Meeting, Moscow 28-Aug-07 Static Requirements Checking  Static Requirements Checker proves the following properties: >Consistency; >Completeness; >User-defined safety conditions;

13 INTAS Meeting, Moscow 28-Aug-07 Piloting and verification by VRS (CDMA) AttributeValueComment Pages971Total number of pages in the source documentation Requirements6000Total number of all requirements in the source documentation Behavioral Requirements 1800The number of behavioral requirements in the source documentation Requirement Coverage 80%Percentage of the behavioral requirements which were formalized and then verified Formalization is still not completed due to a huge amount of findings detected Basic Protocols558Total number of basic protocols developed from the covered behavioral requirements Considered Trace Space 7*10 9 Total number of traces originated from the developed basic protocols and considered during the verification process Findings870:Low; 42:Medium; 45:High Document errors11612:Low; 104:Medium; 0:High Piloting Statistics

14 INTAS Meeting, Moscow 28-Aug-07 Piloting and verification by VRS (CDMA) Efforts Spent and Defects Found Defects Found Accepted170 Rejected29 Still uncertain4 Total:203 Effort in Staff-weeks Spent for Studying documentation1.8 Developing basic protocols8.35 Trace generation1.0 Trace analysis0.05 Creating Verification Report0.2 Total: hours per defect; 3.2 hours per accepted defect 22% of defects are of HIGH severity!