Cs 61C L2 Asm Ops.1 Patterson Spring 99 ©UCB CS61C C/Assembler Operators and Operands Lecture 2 January 22, 1999 Dave Patterson (http.cs.berkeley.edu/~patterson)

Slides:



Advertisements
Similar presentations
Lecture 13: 10/8/2002CS170 Fall CS170 Computer Organization and Architecture I Ayman Abdel-Hamid Department of Computer Science Old Dominion University.
Advertisements

Goal: Write Programs in Assembly
Instruction Set-Intro
1 ECE462/562 ISA and Datapath Review Ali Akoglu. 2 Instruction Set Architecture A very important abstraction –interface between hardware and low-level.
©UCB CS 161 Lecture 4 Prof. L.N. Bhuyan
1 ECE369 ECE369 Chapter 2. 2 ECE369 Instruction Set Architecture A very important abstraction –interface between hardware and low-level software –standardizes.
CS3350B Computer Architecture Winter 2015 Lecture 4
Systems Architecture Lecture 5: MIPS Instruction Set
Chapter 2 Instructions: Language of the Computer
Chapter 2.
COMP3221 lec-12-mem-II.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lecture 12: Memory Access - II
Cs 61C L1 Intro.1 Patterson Fall00 ©UCB CS61C Machine Structures Lecture 1 August 30,2000 Dave Patterson (http.cs.berkeley.edu/~patterson)
Inst.eecs.berkeley.edu/~cs61c UCB CS61C : Machine Structures Lecture 6 – Introduction to MIPS Data Transfer & Decisions I Pieter Abbeel’s recent.
COMP3221 lec08-arith.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lecture 8: C/Assembler Data Processing
Chap.2: Instructions: Language of the computer Jen-Chang Liu, Spring 2006 Adapted from
CS 61C L06 MIPS Intro (1) A Carle, Summer 2005 © UCB inst.eecs.berkeley.edu/~cs61c/su05 CS61C : Machine Structures Lecture #6: Intro to MIPS
CS61C L09 Introduction to MIPS: Data Transfer & Decisions I (1) Garcia © UCB Lecturer PSOE Dan Garcia inst.eecs.berkeley.edu/~cs61c.
Cs 61C L3 Decisions.1 Patterson Spring 99 ©UCB CS61C Constants and Making Decisions in C/Assembly Language Lecture 3 January 27, 1999 Dave Patterson (http.cs.berkeley.edu/~patterson)
CS61C L6 Intro MIPS ; Load & Store (1) Garcia, Fall 2005 © UCB Hate EMACS? Love EMACS? Richard M. Stallman, a famous proponent of open- source software,
Normal C Memory Management °A program’s address space contains 4 regions: stack: local variables, grows downward heap: space requested for pointers via.
CS 61C L09 Introduction to MIPS: Data Transfer & Decisions I (1) Garcia, Fall 2004 © UCB Lecturer PSOE Dan Garcia inst.eecs.berkeley.edu/~cs61c.
Elec2041 lec-11-mem-I.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lecture 11: Memory Access - I
Cs 61C L3 Decisions.1 Patterson Spring 99 ©UCB CS61C Machine Structures Lecture 1 January 20, 1999 Dave Patterson (http.cs.berkeley.edu/~patterson)
CS61C L7 MIPS: Load & Store, Decisions (1) Chae, Summer 2008 © UCB Albert Chae, Instructor inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture.
CS 61C L07 MIPS Memory (1) A Carle, Summer 2005 © UCB inst.eecs.berkeley.edu/~cs61c/su05 CS61C : Machine Structures Lecture #7: MIPS Memory & Decisions.
CS1104 Assembly Language: Part 1
CS 61C L08 Introduction to MIPS Assembly Language: Arithmetic (1) Garcia, Spring 2004 © UCB Lecturer PSOE Dan Garcia inst.eecs.berkeley.edu/~cs61c.
From C to Assembly Language Jen-Chang Liu, Spring 2006 Adapted from
Data Transfer & Decisions I (1) Fall 2005 Lecture 3: MIPS Assembly language Decisions I.
CS61C L09 Introduction to MIPS : Data Transfer and Decisions (1) Garcia, Spring 2007 © UCB Lecturer SOE Dan Garcia inst.eecs.berkeley.edu/~cs61c.
Intel has developed a new technique to generate random numbers that is suitable for integration directly into the CPU! This circuit can turn out 2.4 billion.
Topic 8: Data Transfer Instructions CSE 30: Computer Organization and Systems Programming Winter 2010 Prof. Ryan Kastner Dept. of Computer Science and.
CMPT 334 Computer Organization Chapter 2 Instructions: Language of the Computer [Adapted from Computer Organization and Design 5 th Edition, Patterson.
CDA 3101 Fall 2012 Introduction to Computer Organization Instruction Set Architecture MIPS Instruction Format 04 Sept 2013.
COMP3221 lec04--prog-model.1 Saeid Nooshabadi COMP 3221 Microprocessors and Embedded Systems Lecture 4: Programmer’s Model of Microprocessors
Reformatting a Machine 125 Million Miles Away! Mars rover “Opportunity” got its flash drive reformatted 9/8/14, reason: rover keeps rebooting. Happy news:
Lecture 4: MIPS Instruction Set Reminders: –Homework #1 posted: due next Wed. –Midterm #1 scheduled Friday September 26 th, 2014 Location: TODD 430 –Midterm.
Chapter 2 Instructions: Language of the Computer Part I.
Computer Organization and Architecture Instructions: Language of the Machine Hennessy Patterson 2/E chapter 3. Notes are available with photocopier 24.
CWRU EECS 3221 Language of the Machine EECS 322 Computer Architecture Instructor: Francis G. Wolff Case Western Reserve University.
Computer Architecture CSE 3322 Lecture 2 NO CLASS MON Sept 1 Course WEB SITE crystal.uta.edu/~jpatters.
CHAPTER 6 Instruction Set Architecture 12/7/
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 7, 8 Instruction Set Architecture.
Assembly Variables: Registers Unlike HLL like C or Java, assembly cannot use variables – Why not? Keep Hardware Simple Assembly Operands are registers.
1 TM 1 Embedded Systems Lab./Honam University ARM Microprocessor Programming Model.
CHAPTER 2 Instruction Set Architecture 3/21/
CSCI-365 Computer Organization Lecture Note: Some slides and/or pictures in the following are adapted from: Computer Organization and Design, Patterson.
MIPS: Load & Store, Decisions. Memory management review Three 3’s Picking blocks off free list  best-, first-, next-fit Attempts to solve external fragmentation.
Assembly Language Basic job of a CPU: execute lots of instructions. Instructions are the primitive operations that the CPU may execute. Different CPUs.
Computer Architecture & Operations I
Computer Architecture & Operations I
CS2100 Computer Organisation
Instruction Set Architecture
Microprocessor Systems Design I
Lecturer SOE Dan Garcia
CSE 410: Computer Systems Instructor: David Ely
Computer Architecture (CS 207 D) Instruction Set Architecture ISA
Systems Architecture I (CS ) Lecture 5: MIPS Instruction Set*
Systems Architecture Lecture 5: MIPS Instruction Set
C second, objective-c, Go up!
Lecturer SOE Dan Garcia
Computer Architecture
September 17 Test 1 pre(re)view Fang-Yi will demonstrate Spim
3.
COMS 361 Computer Organization
Instructions in Machine Language
COMS 361 Computer Organization
CPU Structure CPU must:
Systems Architecture I (CS ) Lecture 5: MIPS Instruction Set*
Instruction Set Architecture
Presentation transcript:

cs 61C L2 Asm Ops.1 Patterson Spring 99 ©UCB CS61C C/Assembler Operators and Operands Lecture 2 January 22, 1999 Dave Patterson (http.cs.berkeley.edu/~patterson) www-inst.eecs.berkeley.edu/~cs61c/schedule.html

cs 61C L2 Asm Ops.2 Patterson Spring 99 ©UCB “Machine Structures” Review #1/3 I/O systemProcessor Compiler Operating System (Windows 98) Application (Explorer) Digital Design Circuit Design Instruction Set Architecture °Coordination of many levels of abstraction Datapath & Control transistors Memory Hardware Software Assembler 61C

cs 61C L2 Asm Ops.3 Patterson Spring 99 ©UCB Review #2/3 °Continued Rapid Improvement in Computing 2X every 1.5 years; processor speed, memory size, disk capacity; Moore’s Law as enabler (2X transistors/chip/1.5 yrs) °5 classic components of all computers 1. Control 2. Datapath 3. Memory 4. Input 5. Output } Processor

cs 61C L2 Asm Ops.4 Patterson Spring 99 ©UCB Review #3/3 °15 weeks to learn big ideas in CS&E Principle of abstraction, used to build systems as layers Compilation v. interpretation to move down layers of system Pliable Data: a program determines what it is Stored program concept: instructions are data Principle of Locality, exploited via a memory hierarchy (cache) Greater performance by exploiting parallelism Principles/pitfalls of performance measurement

cs 61C L2 Asm Ops.5 Patterson Spring 99 ©UCB Overview °C operators, operands (2 min) °MIPS Assembly Instructions (5 min) °Compilation (5 min) °MIPS Assembly Operands: Registers (5) °Administrivia, “Computers in the News” (5 min) °MIPS Assembly Operands: Memory (20) °C/Assembly Examples (5 min) °Conclusion (2 min)

cs 61C L2 Asm Ops.6 Patterson Spring 99 ©UCB C Operators/Operands °Arithmetic operators: +, -, *, /, % (mod) °Assignment: Variable = expression °Operands: Variables: lower, upper, fahr, celsius Constants: e.g., 0, 1000, -17, 15 °In C (and most High Level Languages) variables declared 1st and given a type Example: int fahr, celsius; int a, b, c, d, e;

cs 61C L2 Asm Ops.7 Patterson Spring 99 ©UCB C Operators/Operands Examples a = b + c; a = b + c + d - e; celsius = 5 * (fahr - 32) / 9; °Called Assignment statements

cs 61C L2 Asm Ops.8 Patterson Spring 99 ©UCB Assembly Operators °Syntax of Assembly Operator 1) operation by name 2) operand getting result 3) 1st operand for operation 4) 2nd operand for operation °Ex. add b to c and put the result in a: add a, b, c Called an (assembly language) Instruction °Equivalent assignment statement in C: a = b + c;

cs 61C L2 Asm Ops.9 Patterson Spring 99 ©UCB Assembly Operators/Instructions °MIPS Assembly Syntax is rigid: 1 operation, 3 variables Why? Keep Hardware simple via regularity °How do following C statement? a = b + c + d - e; °Break into multiple instructions add a, b, c # a = sum of b & c add a, a, d # a = sum of b,c,d sub a, a, e # a = b+c+d-e °To right of sharp (#) is a comment terminated by end of the line C comments have format /* comment */, can span many lines

cs 61C L2 Asm Ops.10 Patterson Spring 99 ©UCB Assembly Operators/Intructions °Note: Unlike C (and most other HLL), each line of assembly contains at most 1 instruction

cs 61C L2 Asm Ops.11 Patterson Spring 99 ©UCB Compilation °How turn notation programmers prefer into notation computer understands? °Program to translate C statements into Assembly Language instructions; called a compiler °Example: compile by hand this C code: a = b + c; d = a - e; °Easy: add a, b, c sub d, a, e °Big Idea: compiler translates notation from 1 level of abstraction to lower level

cs 61C L2 Asm Ops.12 Patterson Spring 99 ©UCB Compilation 2 °Example: compile by hand this C code: f = (g + h) - (i + j); °First sum of g and h. Where put result? add f,g,h # f contains g+h °Now sum of i and j. Where put result? Cannot use f ! Compiler creates temporary variable to hold sum: t1 add t1,i,j # t1 contains i+j °Finally produce difference sub f,f,t1 # f=(g+h)-(i+j)

cs 61C L2 Asm Ops.13 Patterson Spring 99 ©UCB Compilation 2 Summary °C statement (5 operands, 3 operators): f = (g + h) - (i + j); °Becomes 3 assembly instructions (6 unique operands, 3 operators): add f,g,h # f contains g+h add t1,i,j # t1 contains i+j sub f,f,t1 # f=(g+h)-(i+j) °In general, each line of C produces many assembly instructions One reason why people program in C vs. Assembly; fewer lines of code Other reasons?

cs 61C L2 Asm Ops.14 Patterson Spring 99 ©UCB Assembly Operands °Unlike HLL, assembly instructions cannot use variables Why not? Keep Hardware Simple °Instruction operands are registers: limited number of special locations; 32 registers in MIPS Why 32? Smaller is faster °Each MIPS register is 32 bits wide Groups of 32 bits called a word in MIPS

cs 61C L2 Asm Ops.15 Patterson Spring 99 ©UCB Assembly Operands: Registers °Naming of 32 registers: instead of r0, r1, …, r31, use $s0, $s1, … for registers corresponding to C variables $t0, $t1, … for registers corresponding to temporary variables Will explain mapping convention later of $s0, $s1, …, $t0, $t1, …, to r0, r1, … °Note: whereas C declares its operands, Assembly operands (registers) are fixed and not declared

cs 61C L2 Asm Ops.16 Patterson Spring 99 ©UCB Compilation using Registers °Compile by hand using register names: f = (g + h) - (i + j); f maps onto $s0 g maps onto $s1 h maps onto $s2 i maps onto $s3 j maps onto $s4 °MIPS Instructions: Try this yourself during Adminstrivia

cs 61C L2 Asm Ops.17 Patterson Spring 99 ©UCB Administrivia °Grading: fixed scale, not on a curve °Class voted cheating penalty: 0 for problem on lab, assignment 0 for project, exam Per university rules, contact Office of Student Conduct to report cheating °To try to switch sections go to old and new sections to ask for TAs’ OK °Viewing lectures again: 100 Wheeler T/T 5-6 (old tapes in 205 McLaughlin) °Readings: Ch.3 COD ,3.5,3.8

cs 61C L2 Asm Ops.18 Patterson Spring 99 ©UCB Administrivia °Read web page: Intro, FAQ, Schedule www-inst.eecs/~cs61c Midterm 3/ PM, Final 5/ PM °1st homework: COD Exercises , 1.18, , 1.25, , , , 1.56; Due Wed. 1/27 7PM (do by yourself); readings all but 1.4,1.5 °1st project: C spelling checker philspel Due Wed. 2/3 7PM (do by yourself) www-inst.EECS/~cs61c/handouts/proj1.pdf °1st lab: Read SPIM (A-39 to A-48); see newsgroup for what to do before lab

cs 61C L2 Asm Ops.19 Patterson Spring 99 ©UCB Administrivia °Advice on doing well in CS61C °Review the lecture notes before the lecture to see what you don’t understand °Do the reading assignments before the lecture on the topic, not just before the exam on the material (have to do it sometime) People say it’s a well-written text! °Don’t stay up all night before the midterm or final! Will make mistakes that will cost points Go to a movie and be refreshed at exam

cs 61C L2 Asm Ops.20 Patterson Spring 99 ©UCB “Computers in the News” (see slide #2) °“Browsers and Borders Are Argued at the Microsoft Trial”, N.Y. Times 1/20/99 “... the Government spent most of today attacking the company's central defense-- that its Internet browsing software is a seamless feature of its Windows operating system and not a stand-alone product. The Government is trying to prove that the browser and operating system are two products, illegally bundled together mainly to stifle competition.” “... even Michael Dertouzos[MIT],... who was initially on Microsoft's witness list but was later dropped -- had testified in a deposition that he considered the browser an application program, separate from the operating system.”

cs 61C L2 Asm Ops.21 Patterson Spring 99 ©UCB Compilation using Registers °Compile by hand using registers: f = (g + h) - (i + j); f: $s0, g: $s1, h: $s2, i: $s3, j: $s4 °MIPS Instructions: add $s0,$s1,$s2# $s0 = g+h add $t1,$s3,$s4# $t1 = i+j sub $s0,$s0,$t1# f=(g+h)-(i+j)

cs 61C L2 Asm Ops.22 Patterson Spring 99 ©UCB Assembly Operands: Memory °C variables map onto registers; what about data structures like arrays? °1 of 5 components of a computer: memory contains such data structures °But arithmetic instructions only operate on registers? °Data transfer instructions transfer data between registers and memory Think of memory as a large single dimensioned array, starting at 0

cs 61C L2 Asm Ops.23 Patterson Spring 99 ©UCB Data Transfer Instruction: Memory to Reg °Load: moves instruction from memory to register Syntax: 1) operation name 2) register to be loaded 3) constant and register to access memory °MIPS name, lw for load word: Example: lw $t0, 8($s3) Called “offset” Called “base register”

cs 61C L2 Asm Ops.24 Patterson Spring 99 ©UCB Compilation when Operand is in Memory °Compile by hand using registers: g = h + A[8]; g: $s1, h: $s2, $s3 : starting address (base address) of array A °Since A[8] is in memory, 1st transfer from memory to (temporary) register: lw$t0,8($s3) # $t0 gets A[8] Adds 8 to $s3 to select A[8], puts into $t0 °Next add it to h and place in g add $s1,$s2,$t0# $s1 = h+A[8]

cs 61C L2 Asm Ops.25 Patterson Spring 99 ©UCB Addressing: Byte vs. word °Every word in memory has an address, similar to an index in an array °Early computers numbered words like C numbers elements of an array: Memory[0], Memory[1], Memory[2], … °Computers needed to access 8-bit bytes as well as words (4 bytes/word) °Today machines address memory as bytes, hence word addresses differ by 4 Memory[0], Memory[4], Memory[8], … Called the “address” of a word

cs 61C L2 Asm Ops.26 Patterson Spring 99 ©UCB Notes about Memory °Pitfall: Forgetting that sequential word addresses in machines with byte addressing do not differ by 1. Many an assembly language programmer has toiled over errors made by assuming that the address of the next word can be found by incrementing the address in a register by 1 instead of by the word size in bytes. Another advantage of compilers: they use proper byte address for words

cs 61C L2 Asm Ops.27 Patterson Spring 99 ©UCB Compilation with Memory Revisited °What offset in lw to select A[8] in C? ° 4x8=32 to select A[8] : byte v. word °Compile by hand using registers: g = h + A[8]; g : $s1, h : $s2, $s3 :base address of A °1st transfer from memory to register: lw$t0,32($s3) # $t0 gets A[8] Add 32 to $s3 to select A[8], put into $t0 °Next add it to h and place in g add $s1,$s2,$t0# $s1 = h+A[8]

cs 61C L2 Asm Ops.28 Patterson Spring 99 ©UCB More Notes about Memory °How are bytes numbered in a word? Gulliver’s Travels: Which end of egg to open? Cohen, D. “On holy wars and a plea for peace (data transmission).” Computer, vol.14, (no.10), Oct p Little Endianaddress of least significant byte: Intel 80x86, DEC Alpha Big Endian address of most significant byte HP PA, IBM/Motorola PowerPC, SGI, Sparc Russian Czar to settle arbitrary decision? msblsb little endian byte big endian byte 0

cs 61C L2 Asm Ops.29 Patterson Spring 99 ©UCB More Notes about Memory: Alignment Aligned Not Aligned °MIPS requires that all words start at addresses that are multiples of 4 Called Alignment: objects must fall on address that is multiple of their size. (Later we’ll see how alignment helps performance)

cs 61C L2 Asm Ops.30 Patterson Spring 99 ©UCB Data transfer: Register to Memory °Store: complementary instruction to load °MIPS: sw for Store Word, same syntax as lw °Example: A[12] = h; base address of A: $s3, h: $s2 °MIPS assembly instructions: sw $s2,48($s3) # h into A[12]

cs 61C L2 Asm Ops.31 Patterson Spring 99 ©UCB Compile with variable index °What if array index not a constant? g = h + A[i]; g: $s1, h: $s2, i: $s4, $s3 :base address of A °To load A[i] into a register, first turn i into a byte address; multiply by 4 °How multiply using adds? i + i = 2i, 2i + 2i = 4i add $t1,$s4,$s4# $t1 = 2*i add $t1,$t1,$t1# $t1 = 4*i

cs 61C L2 Asm Ops.32 Patterson Spring 99 ©UCB Compile with variable index, con’t °Next add to base of A: add $t1,$t1,$s3 #$t1=address of #A[i] (4*i+$s3) °Now load A[i] into a temporary register: lw $t0,0($t1) # Temp $t0 = A[i] °Finally add to h and put sum in g : add $s1,$s2,$t0 # g = h + A[i]

cs 61C L2 Asm Ops.33 Patterson Spring 99 ©UCB Compile with variable index: Summary °C statement: g = h + A[i]; °Compiled MIPS assembly instructions: add $t1,$s4,$s4# $t1 = 2*i add $t1,$t1,$t1# $t1 = 4*i add $t1,$t1,$s3 #$t1=addr A[i] lw $t0,0($t1) # $t0 = A[i] add $s1,$s2,$t0 # g = h + A[i]

cs 61C L2 Asm Ops.34 Patterson Spring 99 ©UCB Role of Registers vs. Memory °What if more variables than registers? Compiler trys to keep most frequently used variable in registers Writing less common to memory: spilling °Why not keep all variables in memory? Smaller is faster: registers are faster than memory Registers more versatile: -MIPS arithmetic instruction can read 2, operate on them, and write 1 per instruction -MIPS data transfer only read or write 1 operand per instruction, and no operation

cs 61C L2 Asm Ops.35 Patterson Spring 99 ©UCB (If time allows) Do it yourself: °Compile this MIPS code: B[i] = h + A[i]; h : $s2, i : $s4, $s3 :base address of A, $s5: base address of B

cs 61C L2 Asm Ops.36 Patterson Spring 99 ©UCB (If time allows) Do it yourself: °Compile this C code into MIPS: B[i] = h + A[i]; h : $s2, i : $s4, $s3 :base address of A, $s5: base address of B add $t1,$s4,$s4# $t1 = 2*i add $t1,$t1,$t1# $t1 = 4*i add $t2,$t1,$s3 #$t2=addr A[i] lw $t0,0($t2) # $t0 = A[i] add $t0,$s2,$t0 # $t0 = h+A[i] add $t3,$t1,$s5 #$t3=addr B[i] sw $t0,0($t3) # B[i]= h+A[i]

cs 61C L2 Asm Ops.37 Patterson Spring 99 ©UCB And in Conclusion (2 slides)... °Big idea in CS&E; compilation to translate from one level of abstraction to lower level Generally single HLL statement produces many assembly instructions Also hides address calculations (byte vs. word addressing) °Design of an Assembly Language like MIPS shaped by 1) Desire to keep hardware simple: e.g., each operation has 3 operands 2) Smaller is faster: e.g., MIPS has 32 registers

cs 61C L2 Asm Ops.38 Patterson Spring 99 ©UCB And in Conclusion (last slide)... °MIPS assembly language thus far: Instructions: add, sub, lw, sw At most one assembly instruction per line Comments start with # to end of line Operands: registers $s0, $s1,... ; $t0, $t1,... Operands: memory Memory[0], Memory[4], Memory[8],,..., Memory[ ] °Next: difference between computers and calculators: Making decisions