Figure5.2 Half-adder.

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Figure5.2 Half-adder

Figure5.4 Full-adder

Figure5.7 Circuit that multiplies an 8-bit unsigned number by 3 : a a 7 x x y y 7 7 c 7 s s 7 x x x y y y 8 7 8 7 c 8 s s 8 P = 3 A : P P P 9 8 (a) Naive approach A : a a 7 x x x y y y 8 1 8 7 c 8 s s 8 P = 3 A : P P P 9 8 (b) Efficient design Figure5.7 Circuit that multiplies an 8-bit unsigned number by 3

Figure5.32 Multiplication of unsigned numbers Multiplicand M (14) 1 1 1 0 Multiplier Q (11) ´ 1 0 1 1 1 1 1 0 1 1 1 0 0 0 0 0 1 1 1 0 Product P (154) 1 0 0 1 1 0 1 0 (a) Multiplication by hand Multiplicand M (11) 1 1 1 0 Multiplier Q (14) ´ 1 0 1 1 Partial product 0 1 1 1 0 + 1 1 1 0 Partial product 1 1 0 1 0 1 + 0 0 0 0 Partial product 2 0 1 0 1 0 + 1 1 1 0 Product P (154) 1 0 0 1 1 0 1 0 (b) Multiplication for implementation in hardware Figure5.32 Multiplication of unsigned numbers

Figure5.33 A 4 x 4 multiplier circuit

Figure5.34 Multiplication of signed numbers Multiplicand M (+14) 0 1 1 1 0 Multiplier Q (+11) x 0 1 0 1 1 Partial product 0 0 0 0 1 1 1 0 + 0 1 1 1 0 Partial product 1 0 1 0 1 0 1 + 0 0 0 0 0 Partial product 2 0 0 1 0 1 0 + 0 1 1 1 0 Partial product 3 0 1 0 0 1 1 + 0 0 0 0 0 Product P (+154) 0 0 1 0 0 1 1 0 1 0 (a) Positive multiplicand Multiplicand M ( 14) – 1 0 0 1 0 Multiplier Q (+11) ´ 0 1 0 1 1 Partial product 0 1 1 1 0 0 1 0 + 1 1 0 0 1 0 Partial product 1 1 1 0 1 0 1 1 + 0 0 0 0 0 Partial product 2 1 1 1 0 1 0 1 + 1 1 0 0 1 0 Partial product 3 1 1 0 1 1 0 0 + 0 0 0 0 0 Product P ( 154) – 1 1 0 1 1 0 0 1 1 0 (b) Negative multiplicand Figure5.34 Multiplication of signed numbers

Table 5.4 The seven-bit ASCII code