Kevin Walsh CS 3410, Spring 2010 Computer Science Cornell University Assemblers See: P&H Appendix B.1-2.

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Presentation transcript:

Kevin Walsh CS 3410, Spring 2010 Computer Science Cornell University Assemblers See: P&H Appendix B.1-2

2 Examples... T: ADDI r4, r0, -1 BEQ r3, r0, B ADDI r4, r4, 1 LW r3, 0(r3) J T NOP B: JAL L nop L:LW r5, 0(r31) ADDI r5, r5, 1 SW r5, 0(r31)...

3 cs3410 Recap 3 int x = 10; x = 2 * x + 15; C compiler addir5, r0, 10 mulir5, r5, 2 addir5, r5, 15 MIPS assembly machine code assembler CPU Circuits Gates Transistors Silicon

4 Example 1... T:ADDI r4,r0,-1 BEQ r3, r0, B ADDI r4,r4, 1 LW r3, 0(r3) J T NOP B:

5 References Q: How to resolve labels into offsets and addresses? A: Two-pass assembly 1 st pass: lay out instructions and data, and build a symbol table (mapping labels to addresses) as you go 2 nd pass: encode instructions and data in binary, using symbol table to resolve references

6 Example 2... JAL L nop L:LW r5, 0(r31) ADDI r5,r5,1 SW r5, 0(r31)

7 Example 2 (better).text 0x # code segment... ORI r4, r0, counter LW r5, 0(r4) ADDI r5, r5, 1 SW r5, 0(r4)....data 0x # data segment counter:.word 0

8 Lessons Lessons: Mixed data and instructions (von Neumann) … but best kept in separate segments Specify layout and data using assembler directives Use pseudo-instructions

9 Pseudo-Instructions NOP # do nothing MOVE reg, reg # copy between regs LI reg, imm # load immediate (up to 32 bits) LA reg, label # load address (32 bits) B label # unconditional branch BLT reg, reg, label # branch less than

10 Assembler Assembler: assembly instructions + psuedo-instructions + data and layout directives = executable program Slightly higher level than plain assembly e.g: takes care of delay slots (will reorder instructions or insert nops)

11 Motivation Q: Will I program in assembly? A: I do... For kernel hacking, device drivers, GPU, etc. For performance (but compilers are getting better) For highly time critical sections For hardware without high level languages For new & advanced instructions: rdtsc, debug registers, performance counters, synchronization,...

12 Stages calc.c math.c io.s libc.o libm.o calc.s math.s io.o calc.o math.o calc.exe

13 Anatomy of an executing program 0xfffffffc 0x top bottom 0x7ffffffc 0x x x

14 Example program vector v = malloc(8); v->x = prompt(“enter x”); v->y = prompt(“enter y”); int c = pi + tnorm(v); print(“result”, c); calc.c int tnorm(vector v) { return abs(v->x)+abs(v->y); } math.c global variable: pi entry point: prompt entry point: print entry point: malloc lib3410.o

15 math.s int abs(x) { return x < 0 ? –x : x; } int tnorm(vector v) { return abs(v->x)+abs(v->y); } math.c tnorm: # arg in r4, return address in r31 # leaves result in r4 abs: # arg in r3, return address in r31 # leaves result in r3

16 calc.s vector v = malloc(8); v->x = prompt(“enter x”); v->y = prompt(“enter y”); int c = pi + tnorm(v); print(“result”, c); calc.c dostuff: # no args, no return value, return addr in r31 MOVE r30, r31 LI r3, 8 # call malloc: arg in r3, ret in r3 JAL malloc MOVE r6, r3 # r6 holds v LA r3, str1 # call prompt: arg in r3, ret in r3 JAL prompt SW r3, 0(r6) LA r3, str2 # call prompt: arg in r3, ret in r3 JAL prompt SW r3, 4(r6) MOVE r4, r6 # call tnorm: arg in r4, ret in r4 JAL tnorm LA r5, pi LW r5, 0(r5) ADD r5, r4, r5 LA r3, str3 # call print: args in r3 and r4 MOVE r4, r5 JAL print JR r30.data str1:.asciiz “enter x” str2:.asciiz “enter y” str3:.asciiz “result”.text.extern prompt.extern print.extern malloc.extern tnorm.global dostuff