6.1 Introduction Two details related to instructions –The way instructions are specified –The ways that operands can be specified.

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Presentation transcript:

6.1 Introduction Two details related to instructions –The way instructions are specified –The ways that operands can be specified

6.2 Zero, One, Two, or Three Address Designs An arbitrary number of operands implies variable length instructions Fetching an arbitrary number of operands takes times

6.3 Zero Operands per Instruction A zero address architecture is also called a stack architecture Operands are implicit

6.4 One operand per Instruction An One address design relies on an implicit operand for each instruction: –A special register known as accumulator Add X –Add x to accumulator

From Essentials of Computer Architecture by Douglas E. Comer. ISBN © 2005 Pearson Education, Inc. All rights reserved.

6.5 Two Operands per Instruction An operation can be applied to specified value instead of merely to accumulator –Add X Y –Move Q R

From Essentials of Computer Architecture by Douglas E. Comer. ISBN © 2005 Pearson Education, Inc. All rights reserved.

6.6 Three Operands per Instruction The third operand can specify a destination –Add X Y Z

From Essentials of Computer Architecture by Douglas E. Comer. ISBN © 2005 Pearson Education, Inc. All rights reserved.

Operand Sources and Immediate Values Operand that specifies a source –A signed constant –An unsigned constant –The contents of a register –The values in a memory location

Operand Sources and Immediate Values(2) Operand that specifies a destation – a single register –A pair of continuous registers –A memory location

6.8 the Von Neumann Bottleneck The time spent performing memory accesses can limit the overall performance To avoid the bottleneck –Restrict most operand to registers

From Essentials of Computer Architecture by Douglas E. Comer. ISBN © 2005 Pearson Education, Inc. All rights reserved.

6.10 Operands that Combine Multiple Values Each operand consist of three fields that specify a type, a register, and an offset.

From Essentials of Computer Architecture by Douglas E. Comer. ISBN © 2005 Pearson Education, Inc. All rights reserved.

6.11 Tradeoffs in the Choice of Operands Several potential design goals –Ease of programming –Fewer instructions –Smaller instructions –Larger range of immediate values –Faster operand fetch and decode –Decreased hardware size

6.12 Values in Memory and Indirect Reference Indirection through register –Obtain A, the current value from register –Interpret A as memory address, and fetch operand from memory

6.12 Values in Memory and Indirect Reference(2) Indirection through a memory address –Obtain M, the value in the operand –Interpret M as memory address, and fetch the value A from memory –Interpret A as memory address, and fetch operand from memory

From Essentials of Computer Architecture by Douglas E. Comer. ISBN © 2005 Pearson Education, Inc. All rights reserved.

6.13 Operand Addressing Mode Immediate value Direct register reference Indirect through a register Direct memory reference Indirect memory reference