1 Digital technology roadmap Digital Circuits & Systems Chapter 1: Combinational circuits The theory basics and the classic 74 series / CMOS (SSI & MSI)

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Presentation transcript:

1 Digital technology roadmap Digital Circuits & Systems Chapter 1: Combinational circuits The theory basics and the classic 74 series / CMOS (SSI & MSI) Chapter 2: FSM Chapter 3: Dedicated processors Advanced optional subjects or research Chapter 4: Microcontrollers (µC) Systems on Programmable Chip (SoPC) Systems on Chip (SoC) & ASICS (GA) The versatile GAL22V10 (  500 logic gates) Altera/Lattice/Xilinx CPLD and FPGA (2,5k – 100k logic gates) Large Altera/Lattice/Xilinx FPGA (>100k logic gates) PIC16/18 family of microcontrollers Introductory circuits & FSM Application specific digital systems (Datapath + control unit) Digital processors and subsystems (peripherals) Large volume of production Professional applications in Telecommunications Systems and Telematics Schematics & VHDL VHDL & C Vendor specific design flow tools (MPLAB, assembler, C, simulation Proteus-VSM) Electrical and digital simulation & verification educational boards Active HDL / ModelSim Quartus II / ispLEVER / ISE

2 Digital systems and VHDL Microcontrollers CAD/EDA, laboratory software and tools CSD competencies English Oral and written communication Team work Self-directed learning Report edition, presentation and publishing ePortfolio edition Project management

3 CSD systematic instructional design Learning objectives and cross-curricular skills Activities and study time scheduling After completing the course students have to be able to … Active methodologies Continuous formative and summative assessment Course evaluation Coherence and consistency In and out of class timetable, problem- based learning, application project Cooperative Learning, integrated learning of content and competencies, Learning by doing Individual and group assessing, every work sample counts and can be improved, group e-portfolio Student questionnaires, and instructors processing Repeated every term Method for solving assignments No need of traditional exams

4 Learning objectives Chapter 1 Combinational circuits Chapter 1 Combinational circuits Chapter 2 Finite state machines Chapter 2 Finite state machines Chapter 3 Digital processor Chapter 3 Digital processor Chapter 4 Microcontrollers Chapter 4 Microcontrollers #6, #7, #8, #10 Cross-curricular objectives: # 1, # 2, # 3, # 4, # 5 #9, #10, #11 #10, #12 #13, #14, #15

5 Chapter 1 Combinational circuits (34.5 h) – 1.38 ECTS Chapter 1 Combinational circuits (34.5 h) – 1.38 ECTS Proteus-ISIS (Labcenter) Minilog WolframAlpha IC prog VHDL ispLEVER Classic (Lattice Semiconductor) ModelSim (Mentor Graphics), Active HDL (Aldec) Synplicity Synplify synthesis (Synopsys) CSD specific content Chapter 2 Finite state machines (FSM) (23h) – 0.92 ECTS Chapter 2 Finite state machines (FSM) (23h) – 0.92 ECTS Chapter 3 Digital processor (OU + CU) (23h) – 0.92 ECTS Chapter 3 Digital processor (OU + CU) (23h) – 0.92 ECTS Chapter 4 Microcontrollers (  C) (69h) – 2.78 ECTS Chapter 4 Microcontrollers (  C) (69h) – 2.78 ECTS Quartus II (Altera) ispLEVER Starter (Lattice Semiconductor) ISE (Xilinx) Proteus-VSM (Labcenter) MPLAB (Microchip) HI-TECH C Compiler for PIC10/12/16 MCUs (Lite mode) (Microchip) Classic IC’s sPLD GAL22V10 Programmable logic devices (CPLD and FPGA) from Altera, Lattice, Xilinx Training boards (UP2, DE2, Spartan 3AN Starter Kit, MachXO USB Starter Kit, etc. PIC 16F family of microcontrollers Training boards PICDEM2+, etc.

6 Oral and written communication Microsoft Office Visio Thunderbird CMapTools Gantt diagrams Google docs CSD generic tools English Self-directed learning Team work Proofing tools Web editing tools Google sites Google translate Etc.

7 Planning activities and study time inside and outside the classroom (ECTS) Activities (~problem solving) A PBL and CL course means training students for master degrees Exercises Application project Individual assessment ePortfolio Weekly study plan Problem solving teamwork session (2 h) Problem solving teamwork session (2 h) Guided academic activities (1 h) Student-conducted teamwork sessions (>6h) Extra individual work Guided learning 11.5 h per week 6 ECTS Problem solving teamwork session at laboratory (2 h) Self-directed learning

8 Activities  Design of real world applications Designed using PLD/VHDL Designed using microcontrollers

9 EX : exercise/problemC : correctionIM: improvementAP: projectPO: portfolio Course timetable

10 Cooperative Learning as the instructional method Positive interdependence Team members are obliged to rely on one another to achieve their common goal Individual accountability All students in a group are held accountable for doing their share of the work and for mastery of all of the content to be learned Face-to-face promotive interaction Group members providing one another with feedback, challenging one another’s conclusions and reasoning, and teaching and encouraging one another Appropriate use of collaborative skills Students are encouraged and helped to develop and practice skills in communication, leadership, decision-making, conflict management, and other aspects of effective teamwork Regular self-assessment of group functioning Team members periodically assess what they are doing well as a team and what they need to work on for functioning more effectively in the future

11 A typical 2-hour group work sessions Questions from previous sessions or exercises Introduction of new concepts or materials (generally, the problem to be designed) Group work for revising concepts and planning exercises Questions, discussion and general orientations Group work for developing exercises Conclusions and planning the autonomous session outside the classroom Up to 15 minutes 30 minutes Up to 15 minutes 30 minutes 15 minutes

12 Assessment is not a mechanism for verifying student knowledge, but an stimulus to guarantee that (motivated) students will do the group tasks which lead them to learn the content and skills Student assessment Every piece of work counts for the final grade Final exams are no longer needed Assessment is another learning activity integrated in the course dynamics  ePortfolio

13 Assessment scheme Exercises + Individual controls + Application Project + e-Portfolio + Participation and attitude 6 deliverables with voluntary improvement 5 individual unannounced exams Includes an oral presentation and a written report n Very important: rubrics for correcting and fast feedback Examples to demonstrate cross- curricular skills development and reflection Students have to pass all the 5 minimums in order to pass the course

14 An excellent way for showing evidences of what have been learned Semi-structured group portfolio organised according the subject’s cross-curricular skills Cooperative group ePortfolio Table of contents 1. Course, purpose, audience and structure 2. A list of hardware/software tools 3. Work samples and reflection for the cross-curricular skills 1. 3rd language (English) 1. An active reading of a paper or a book unit 2. A written assignment in English 3. Exam solution 2. Team work 1. Learning an electronic design automation (EDA) tool in group 2. An example of a group assignment 3. Oral and written communication 1. A concept prepared to learn the design flow for a digital circuit 2. A peer-reviewed written assignment 3. An oral presentation in class 4. Self-directed learning 1. Example of a project organisation and development 2. Example of a unit or lesson studied autonomously 4. General reflection and conclusions

15 Course evaluation and processing Learning objectives and cross-curricular skills Activities and study time scheduling Active methodologies Continuous formative and summative assessment Course evaluation Coherence and consistency Student questionnaires, and instructors processing This quality cycle has to be repeated every term The aim is to prepare a plan with specific actions to improve teaching in upcoming courses (problems redesigning, timetable scheduling, workload, teaching materials, new software, demonstration exercises, etc.) CSD WEB page 