Slide 1 FEC Software 21 April 2004 R.Stone Rutgers University Pixel FEC Workshop.

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Presentation transcript:

slide 1 FEC Software 21 April 2004 R.Stone Rutgers University Pixel FEC Workshop

slide 2 Overview What controls the FEC03 now: Cosmo Development of the VME FEC – Block structure – What role for Cosmo? – Language issues – VME to I2C rate issues Final Version – FEC to Pixel Supervisor interface – Standalone GUI interface – Errors from I2C?

slide 3 Cosmo - Hardware: PSI 46

slide 4 Cosmo and FEC02 (now) Transition from PSI43 to 46 complete Stores and loads settings for entire module(s): – DACs and Pixel thresh, enable Generates normal, synch or cal triggers Controls Aout digitization Addresses 32 ports Complex scripting of commands, calibration USB interface to Ed’s FEC02 / TBM03,4 A general purpose tool: – Bench testing, testbeam, system testing – Can easily debug Aout (using scope or ADC) – Can easily debug I2C (data return from TBM)

slide 5 FEC Software Block Diagram

slide 6 Cosmo GUI for VME FEC Permanent role as diagnostic mode supervisor: – Useful for initial FPGA mFEC development – Initial system tests, Burnin – During Pixel installation: system check out tool Cosmo mode available via S/A FEC or in Pixel Supervisor Until automatic tools fully debugged, Cosmo may be the preferred way to set up and make changes to the pixel system.

slide 7 Cosmo Changes for VME FEC Replace USB interface with VME (use tracker FEC code?) Add database access tools Add XDAC process communication

slide 8 FEC Language Issues Cosmo now a mix of C, XML, TCL/TK, and ? Prefer to leave GUI in TCL Can easily fold the rest into C++ Use Tracker FEC software for dealing with VME?

slide 9 VME to I2C rates What is the VME time to load all pixels (at run start) ? Use 4MB/s very conservative non-block mode transfer rate Time to load 1/16 (1 DOH) of a FEC module: 0.4 s – 6-14 dual TBMs – ROCs per TBM – 166 Bytes/single column – 52 columns x 16 per FEC module: 7 s x 8 FEC modules in VME crate: 1 min !!

slide 10 VME to I2C rates for Private Orbit What is the VME time to load all FECs for private orbit refresh ? Use 4MB/s very conservative non-block mode rate Time to load 1/16 (1 DOH) of a FEC module: 8 ms – 6-14 dual TBMs – ROCs per TBM – 166 Bytes/single column x 16 per FEC module: 0.1 s x 8 FEC modules in VME crate: 1 s Implication: there may be VME limits to rate of private orbit refresh

slide 11 I2C Error Check How to know if an I2C link is alive and well? Can look at I2C readback from the TBM Hub – Should have the correct HUB address – Can compare command sent with command reflected back – But not in mFEC hardware?, only in FEC soft? – Maybe only have enough VME bandwidth to look at Hub address and # of bytes returned Perhaps these last two word comparisons can be squeezed into FEC FPGA??

slide 12 Towards Final FEC Software FEC to Pixel Supervisor Interface: – Define calling standard FEC to Database Interface: – Define calling standard Define switching between “normal” mode and “diagnostic” mode How to handle I2C error reporting?

slide 13 Special FEC03 applications

slide 14 Burnin Testing Goals Readout 20 plaquettes for ~3 days – up to 200 ROCs per teststand – multiple test stands? – looking for infant ROC mortality Temp cycling: slowly between room T and –25C Time stamp the Aout data---when is the failure? Also readout Temp and module current Interface to/from DB: critical Will be ready by Sep 2005

slide 15

slide 16

slide 17 Mods to Cosmo for Burnin Need to implement 10-fold Aout switch – one board with a few chips – Parallel port interface (doesn’t need to be fast) – coordinate Aout data with switch setting Hooks to/from DB – details of this interface currently under study – what to store, what to load? Write the testing script Backend Aout data analysis – how to identify failing ROCs

slide 18 Blade/Module Testing and Beyond Blade/Module tests: – No real changes needed to Cosmo – Will also test TBM System tests: – Will need to incorporate AOH, real FEC, FED – So USB will to migrate to VME – (VME migration will already be underway because of Pixel FEC development) Beyond: – Address multiple FECs, language?