Computerized Train Control System by: Shawn Lord Christian Thompson Advisor: Dr. Schertz.

Slides:



Advertisements
Similar presentations
IO Interfaces and Bus Standards. Interface circuits Consists of the cktry required to connect an i/o device to a computer. On one side we have data bus.
Advertisements

Computer Architecture
INPUT-OUTPUT ORGANIZATION
Smart Card Reader. Quick Start Training Agenda Smart Card Introduction ISO 7816 Standard Smart Card Operation CoolRunner-II Smart Card Reader CoolRunner-II.
MC68HC11 System Overview. System block diagram (A8 version)
Products Training -- DGUS LCM
Programmable Interval Timer
TK2633 Introduction to Parallel Data Interfacing DR MASRI AYOB.
1/1/ / faculty of Electrical Engineering eindhoven university of technology Architectures of Digital Information Systems Part 1: Interrupts and DMA dr.ir.
I/O Unit.
CS-334: Computer Architecture
FIU Chapter 7: Input/Output Jerome Crooks Panyawat Chiamprasert
Bradley University Department of Electrical and Computer Engineering 2011 Wind Tunnel Control (WEBWIND) By: Adam Green Advisor: Dr. Aleksander Malinowski.
Webtrain Decoupling Adam Kadolph EE451 Bradley University Advisors: Dr. Irwin, Dr. Schertz Week 1-6 Monday 11/27.
Introduction to Microprocessors Number Systems and Conversions No /6/00 Chapter 1: Introduction to 68HC11 The 68HC11 Microcontroller.
System for Engine Location Of a Web Train Paul Wimmer and Adam Weintrop Dr. Irwin and Dr. Schertz 12/5/05 Project Proposal -CTCDS.
DMX512 Programmable Theater Lighting Controller Jeff Sand and Kris Kopel Advisor: Dr. Don Schertz May 8, 2001.
Coordinate Based Tracking System
P Address bus Data bus Read-Only Memory (ROM) Read-Write Memory (RAM)
System for Engine Location Of a Web Train Paul Wimmer and Adam Weintrop Dr. Irwin and Dr. Schertz 2/6/06.
Web-based Control Interface For a model train control system By: Kevin Sendra.
Wireless Data Acquisition for SAE Car Project by: J.P. Haberkorn & Jon Trainor Advised by: Mr. Steven Gutschlag.
System for Engine Location of the WebTrain Adam Weintrop and Paul Wimmer Advisors Dr. Irwin and Dr. Schertz.
Group 7 Jhonathan Briceño Reginal Etienne Christian Kruger Felix Martinez Dane Minott Immer S Rivera Ander Sahonero.
INPUT-OUTPUT ORGANIZATION
SCADA and Telemetry Presented By:.
1 © Unitec New Zealand Embedded Hardware ETEC 6416 Date: - 10 Aug,2011.
Computerized Train Control System by: Shawn Lord Christian Thompson.
Input/Output. Input/Output Problems Wide variety of peripherals —Delivering different amounts of data —At different speeds —In different formats All slower.
Module 1 WANs and Routers.
Khaled A. Al-Utaibi  Intel Peripheral Controller Chips  Basic Description of the 8255  Pin Configuration of the 8255  Block Diagram.
Chapter 10: Input / Output Devices Dr Mohamed Menacer Taibah University
Input/Output mechanisms
Introduction to Computing: Lecture 4
Dr. Rabie A. Ramadan Al-Azhar University Lecture 6
MICROPROCESSOR INPUT/OUTPUT
Basic I/O Interface A Course in Microprocessor
8086/8088 Hardware Specifications Power supply:  +5V with tolerance of ±10%;  360mA. Input characteristics:  Logic 0 – 0.8V maximum, ±10μA maximum;
(More) Interfacing concepts. Introduction Overview of I/O operations Programmed I/O – Standard I/O – Memory Mapped I/O Device synchronization Readings:
Memory Interface A Course in Microprocessor Electrical Engineering Dept. University of Indonesia.
Dr Mohamed Menacer College of Computer Science and Engineering Taibah University CE-321: Computer.
Senior Project Presentation: Designers: Shreya Prasad & Heather Smith Advisor: Dr. Vinod Prasad May 6th, 2003 Internal Hardware Design of a Microcontroller.
CDR- Digital Audio Recorder/Player Brian Cowdrey Mike Ingoldby Gaurav Raje Jeff Swetnam.
ATtiny23131 A SEMINAR ON AVR MICROCONTROLLER ATtiny2313.
12/16/  List the elements of 8255A Programmable Peripheral Interface (PPI)  Explain its various operating modes  Develop a simple program to.
PPI-8255.
Input/Output Problems Wide variety of peripherals —Delivering different amounts of data —At different speeds —In different formats All slower than CPU.
IT3002 Computer Architecture
Fundamentals of Programming Languages-II
بسم الله الرحمن الرحيم MEMORY AND I/O.
1 Device Controller I/O units typically consist of A mechanical component: the device itself An electronic component: the device controller or adapter.
Basic Computer Organization and Design
Arduino Based Industrial appliances control system by decoding dual tone multi frequency signals on GSM / CDMA network. Submitted by:
I/O SYSTEMS MANAGEMENT Krishna Kumar Ahirwar ( )
Introduction An interrupt is an event which informs the CPU that its service (action) is needed. Sources of interrupts: Internal fault (e.g.. divide by.
Diagram of microprocessor interface with IO devices
DIGITAL CALCULATOR USING 8051
Adam Kadolph EE451 Bradley University Advisors: Dr. Irwin, Dr. Schertz
COMP2121: Microprocessors and Interfacing
1 Input-Output Organization Computer Organization Computer Architectures Lab Peripheral Devices Input-Output Interface Asynchronous Data Transfer Modes.
Memory Units Memories store data in units from one to eight bits. The most common unit is the byte, which by definition is 8 bits. Computer memories are.
Introduction to Microprocessors and Microcontrollers
Interfacing Memory Interfacing.
Lecture Number 4 Siemens S7.
ACOE347 – Data Acquisition and Automation Systems
Presentation transcript:

Computerized Train Control System by: Shawn Lord Christian Thompson Advisor: Dr. Schertz

Presentation Outline Project Overview Digital Train Control System Components –Local Controller –DCC Format –DCC Encoder –Switch Controller –Sensor Controller Train Layout Design Implementation Results Future Work

Project Overview Digital Train Control System –Digital Control of Model Trains –Control of Track Equipment –Computer Interface Goals –Fully control a digitally equipped locomotive –Control of switches and layout features –Sense train locations and layout state –Link all control to a central computer –Provide a train layout for future use –Provide supporting documentation

Digital Train Control How Digital Control Works –Command Station Takes User Input Sends a command signal on rails of layout –Decoder Card Resides in each locomotive Derives power and data from signal on rails Powers locomotives lights and motor

Digital Train Control Standards –National Model Railroad Association (NMRA) Sets Industry standards for model railroading Recently incorporated standards for digital control –Digital Command Control (DCC) NMRA standard for digital train control Provides standards for communication with compatible Decoder Cards Advantages Locomotives are individually addressable One signal to all rails on layout Existing industry standards

System Components Block Diagram and Data Flow UpstreamDownstream Locomotives Track Accessories Train Layout Track Sensors Controller Application Local Controller DCC Encoder

Local Controller Handles low level control of train layout –Receives commands over serial link with PC –Creates serial packet for control of locomotives –Controls switches and accessories –Polls track sensors for position reporting Implementation –8051 microprocessor –Programmable Logic Device (FPGA) –Signal buffering circuitry

Local Controller Command List –Local Controller Commands –Reset All –Locomotive Commands –Send Override Packet –Send Service Mode Packet –Send From Command List –Add to Command List –Remove from Command List –Clear Command List

Local Controller Command List (contd.) –Switch/Accessory Commands –Set one output –Clear one output –Pulse one output –Reset all outputs –Sensor Commands –Reset sensor timer –Return one sensor –Return all sensors

Program Flow Command Processing Command from PC Continuously write commands out to Encoder Poll sensor(s) Add command to queue Write command out to controller Transmit sensor reading(s) to PC Locomotive Accessory or Switch Sensor

Local Controller Memory Allocation (Memory Mapped IO) –0x00 – 0x07 DCC Encoder –0x08 – 0x7F Output space –0x80 – 0x8F Sensor space

DCC Format Transition based serial encoding Bit times –232us – ‘0’ bit –116us – ‘1’ bit Fully rectified signal provides power for trains

DCC Format Basic Packet Format –Preamble – ten ones followed by a zero –Address – eight bits followed by a zero –Data – eight bits followed by a zero –Error Check – eight bits followed by a one {preamble}0{address}0{data}0{error check}1 Speed Packet –01DCSSSS Other Packet Types

DCC Encoder Receives data from Local Controller Transmits data in DCC format Connected to external bus of Local Controller Interrupts Local Controller upon completion Implemented in VHDL Registers –0x00Command byte –0x00 – 0x07DCC Packet to transmit

DCC Encoder Software Flow check command byte command byte empty transmit idle packet transmit data bytes Interrupt processor on last bit transmit preamble command byte present

System Components Block Diagram and Data Flow UpstreamDownstream Locomotives Track Accessories Train Layout Track Sensors Controller Application Local Controller DCC Encoder

Track Switches Allow locomotives to change paths Solenoid Controlled –Double throw solenoid –Requires 12v 5ms pulse Motor Controlled –Small gear motor –Requires 12v signal –Motor stalls upon end of travel

Switch / Accessory Controller Connected to external bus of Local Controller Latches data from Local Controller 16 outputs total –8 switches –16 accessories –Sinks 600mA continuous or 3A pulsed Addresses –Address + 0Latch A –Address + 1Latch B

Sensors Allow Location of locomotive on layout –Layout divided into 21 blocks –Current sensor on each block Current sensing –1ohm current sense resistor –Differential voltage amplifier

Sensor Controller Connected to A/D input of Local Controller Data Latched from External Bus –000C 0DDD C – enables controller DDD – selects 1 of 8 analog inputs 8 inputs –Selected by analog switch –Inputs filtered using an RC filter

Train Layout

Designed for future use –2 separate loops –2 loopbacks –1 crossover –5 single ended sidings –4 track train yard –1 pass through siding

Train Layout

XS-40 Implementation of Design XS-40 FPGA Prototyping Board –Manufactured by XESS Corporation –Xilinx 4005E-pc84 FPGA chip –8031 uC –128byte SRAM Used to implement Design –Local Controller uses 8031 –DCC Encoder implemented on FPGA –Interface Board Designed A to D converter 256byte EEprom Memory External Bus

Results Hardware –Train Layout Built and Wired –Two DCC Compatible Locomotives –Local Controller Designed and Implemented –Sensors Designed and Tested –Switches Designed and Tested –Controller Boards (Main, Switch, Sensor) Design and Layout complete Not manufactured

Results Software –Serial interface designed and Implemented –Train control designed and implemented –Switch control designed –No software support for sensors –No support for service mode packets

Future Work Manufacture and Build Controller Boards Software –Sensor polling –Service mode packets Decoupling and Crash prevention

Questions ?

Web-based Control Interface For a model train control system By: Kevin Sendra Advisors: Dr. Schertz Dr. Malinowski

Presentation Outline Overview of the Project Project Description Results –Problems –Future work

Project Overview Add-on to the Local Control System Allows control and/or view of the layout from the internet

Project Description Block Diagram Server and Serial Interface

Client Description Allows the user to control the speed and direction of multiple trains Displays connection information and command status (from server) Image Map for switch control (no switch control currently)

Client Flowchart Start Create GUI Elements Connect to Server Start Threads Event Handling Thread Delay Close socket End threads Send Command To Server Wait.5s Thread Receive From Server Append to Text Area Get Parameters

Current GUI

Local Computer Server –Waits for a connection –Logs connections –Receives commands and sends them to the serial port –Acknowledges commands –Sets session length to 10 minutes Webcam Software –Dorgem

Server Flowchart Server Start Wait For A Connection Log Connection Store Time +10m Start Thread Wait For A Command Acknowledge Close Connection Thread Timeout Compare Stored Time To Current Time Disconnect If Equal

Webcam Viewer

Results Working graphical user interface –Allows locomotive speed and direction controls –Displays command status Working Server Viewable webcam stream

Problems The computer –Speed –Security and Software Java versions and Internet Exploreror Netscape

Future Work to be Completed –Implement switch control –Allow a configuration file to set up certain elements of the interface

Train Control Train Control 800x600

Questions

Local Computer Interface By: Zachary Kirkpatrick Advisor: Dr. Schertz For A Digital Train Controller

Presentation Overview Introduction Block Diagram Functional Description Design Accomplishments Complications Conclusion

Introduction Digital Train Controller Local Computer Interface User Input Instruction Send Out Instruction Train Moves

Block Diagram Instruction User Input Computer Local Altered Input Instruction

Functional Description Input User Instructions Decipher User Instructions Alter Code Of Instructions Send Out Instructions To Microprocessor

Design Flow Chart PowerSwitchSpeedMovement User Input OnOff Track UpDown ForwardReverse Train Go Back To User Input

Design Write Software To Draw Control Buttons Output The Appropriate Information For The Corresponding Button Pressed Use MFC Library of C++

Design Control Buttons User Buttons –Power On –Power Off –Switch Tracks –Speed Up –Speed Down –Move Forward –Move In Reverse

Accomplishments Buttons Were Created Buttons Are Active Buttons Are Either –Functional –Personal Constructors

Accomplishments

Complications Sickness The First Several Weeks Slider Buttons Auto-creation Of Files In MFC

Auto-creation Example

Conclusion Buttons Are Created Basis For Button Implementation Created Need To Finish Button Implementation

Questions