Power Distribution FPGADDR2 OEM Board Flash MEMSSDINSD3 Cameras Connector Board 1.2V1.8V5V3.3V 3.3V, 5V, 12V 15V3.3V9-36V.

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Presentation transcript:

Power Distribution FPGADDR2 OEM Board Flash MEMSSDINSD3 Cameras Connector Board 1.2V1.8V5V3.3V 3.3V, 5V, 12V 15V3.3V9-36V

Power Distribution(cont.) -Schematic Using LT1933 taken from Linear Technology

Camera: MT9J003 CMOS Digital Image Sensor Why This Camera? Imaging Array Optical Format: 1/2.3-inch Active Array: 3856(H) x 2764(V) (entire sensor) 3664(H) x 2748(V) (4:3 still mode) 3840(H) x 2160(V) (16:9 video mode) Imaging Area: 6.119mm(H) x 4.589mm(V ) Speed/Output Frame Rate: 15 fps (HiSPi serial I/F) 7.5 fps (parallel I/F) Data Rate: 2.8 Gb/s (HiSPi serial I/F) 80 Mp/s (parallel I/F) Master Clock: 6–48 MHz Data Format: 12-bit RAW Power Supply: Analog:2.4–3.1V (2.8V nominal) Digital: 1.7–1.9V (1.8V nominal) I/O:1.7–1.9V (1.8V nominal) or 2.4–3.1V (2.8V nominal) HiSPi Tx: 0.4–0.8V (0.4V or 0.8V nominal) Consumption: full resolution

Why This Camera? Sensitivity Pixel Size: 1.67μm x 1.67μm Dynamic Range: 65.2dB Responsivity: 0.31 V/lux-sec (550nm) Optics CRA: 0 degree Temperature Range Operating: –30°C to +70°C Package: 10mm x 10mm 48-pin iLCC Summary: This camera was chosen because it takes a 10 Mpix still image as well as having a digital video mode that has a high resolution. It consumes very little power and the two interface options allow for a parallel output and a four-lane serial high speed pixel interface (HiSpi) differential signaling.

Interfaces D3 Camera Interface -16-bit parallel output -6 Miscellaneous positions -Two wire I²C bus interface -Several clock and control positions CameraLink -LVDS to achieve theoretical transmission rate of 1.923Gbps -Not dependent on a particular supply voltage because of low signal voltage swing GigE -High bandwidth for high-speed, and high resolution cameras -Downward compatible with 10/100 Mhz Ethernet -Operates at a fast frame rate