Nanodevices and nanostructures: quantum wires and quantum dots ECE 423 Final Project Wan-Ching Hung Dec 12,2006.

Slides:

Advertisements

Similar presentations

EXPLORING QUANTUM DOTS

Advertisements

Abteilung Festkörperphysik Solid State Physics University of Ulm Abteilung Festkörperphysik Solid State Physics University of Ulm Note that 1µm =

(and briefly, Electrodeposition)

by Alexander Glavtchev

Module A-2: SYNTHESIS & ASSEMBLY

Single Electron Devices Single-electron Transistors

Nanotechnology. Research and technology development at the atomic, molecular or macromolecular levels, in the length scale of approximately nanometer.

Electrical transport and charge detection in nanoscale phosphorus-in-silicon islands Fay Hudson, Andrew Ferguson, Victor Chan, Changyi Yang, David Jamieson,

Topical lecture: Quantum Size Effects in Nanostructures A. Tavkhelidze Ilia State University.

Graphene & Nanowires: Applications Kevin Babb & Petar Petrov Physics 141A Presentation March 5, 2013.

Roadmap of Microelectronic Industry. Scaling of MOSFET Reduction of channel length L  L/α Integration density  α 2 Speed  α; Power/device  1/α 2 Power.

Development of Scanning Probe Lithography (SPL)

Introduction to CMOS VLSI Design Lecture 0: Introduction

Kondo Effects in Carbon Nanotubes

Single Electron Transistor

Single-electron Devices Speaker: Qiaoyan Yu ECE

Fig 10: I-V characteristics of Au/PDNC/Al/Au junction. This shows that the molecule has rectification towards the positive bias. Current (A) M I A M I.

Emerging Nanotechnology Devices

Quantum Dots Arindam Ghosh. Organization of large number of nanostructures – scalability Utilize natural forces Organic, inorganic and biological systems.

MSE-630 Gallium Arsenide Semiconductors. MSE-630 Overview Compound Semiconductor Materials Interest in GaAs Physical Properties Processing Methods Applications.

ECE685 Nanoelectronics – Semiconductor Devices Lecture given by Qiliang Li.

Quantum Dots and Quantum Dot Cellular Automata SOURCES: –Rajarshi Mukhopadhyay, ece. gatech. Edu –Richard Spillman –Yan-Ten Lu, Physics, NCKU –Tony.

Z. Feng VLSI Design 1.1 VLSI Design MOSFET Zhuo Feng.

Towards Single Molecule Electronics

Science and Technology of Nano Materials

InAs on GaAs self assembled Quantum Dots By KH. Zakeri sharif University of technology, Spring 2003.

INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #2. Chip Fabrication  Silicon Ingots  Wafers  Chip Fabrication Steps (FEOL, BEOL)  Processing Categories 

Integrated Circuit Devices Professor Ali Javey Summer 2009 MS Junctions Reading: Chapter14.

Ch. 34 Electric Current.

Metallization: Contact to devices, interconnections between devices and to external Signal (V or I) intensity and speed (frequency response, delay)

TECHNICAL SEMINAR ON TECHNOLOGIES AND DESIGNS FOR ELECTRONIC NANOCOMPUTERS PRESENTED BY : BIJAY KUMAR XESS ADMN NO : 4 I&E/2K.

J.R.Krenn – Nanotechnology – CERN 2003 – Part 2 page 1 NANOTECHNOLOGY Part 2. Electronics The Semiconductor Roadmap Energy Quantization and Quantum Dots.

Techniques for Synthesis of Nano-materials

Confined Carriers DRAGICA VASILESKA PROFESSOR ARIZONA STATE UNIVERSITY.

Introduction to CMOS VLSI Design CMOS Fabrication and Layout Harris, 2004 Updated by Li Chen, 2010.

Computational Solid State Physics 計算物性学特論第１０回 10. Transport properties II: Ballistic transport.

Radio-frequency single-electron transistor (RF-SET) as a fast charge and position sensor 11/01/2005.

Introduction EE1411 Manufacturing Process. EE1412 What is a Semiconductor? Low resistivity => “conductor” High resistivity => “insulator” Intermediate.

Nanotechnology.

IC Processing. Initial Steps: Forming an active region Si 3 N 4 is etched away using an F-plasma: Si3dN4 + 12F → 3SiF 4 + 2N 2 Or removed in hot.

ISAT 436 Micro-/Nanofabrication and Applications Photolithography David J. Lawrence Spring 2004.

EXPERIMENTAL DETAILS 1. plasma assisted molecular beam epitaxy (N=1, 2, and 4) of p-GaN/n-GaN junction diodes top and bottom of this structure are both.

Presented by Darsen Lu (3/19/2007)

1 1 nanometer (nm) = 10 hydrogen atoms side-by-side Meaning of “nano”: One billionth (10x-9) Nanometer (nm) = one billionth of a.

2. Design Determine grating coupler period from theory: Determine grating coupler period from theory: Determine photonic crystal lattice type and dimensions.

Sid Nb device fabrication Superconducting Nb thin film evaporation Evaporate pure Nb to GaAs wafer and test its superconductivity (T c ~9.25k ) Tc~2.5K.

Mesoscopic physics and nanotechnology

CMOS VLSI Fabrication.

Advanced Computing and Information Systems laboratory Nanocomputing technologies José A. B. Fortes Dpt. of Electrical and Computer Eng. and Dpt. of Computer.

Chieh Chang EE 235 – Presentation IMarch 20, 2007 Nanoimprint Lithography for Hybrid Plastic Electronics Michael C. McAlpine, Robin S. Friedman, and Charles.

Sputtering. Why? Thin layer deposition How? Bombarding a surface with ions which knocks out molecules from a target which in turn will redeposit onto.

Sarvajanik College of Engineering & Tech. Project By: Bhogayata Aastha Chamadiya Bushra Dixit Chaula Tandel Aayushi Guided By: Bhaumik Vaidya.

NANO TECHNOLOGY Bhimavaram Institute of Engineering &Technology

Evaluation itemsPoints/10 Relevance to topics Clearness of introduction Background and theory Delivery of knowledge Presentation materials and handout.

Nanotechnologies for Electronics

CMOS Fabrication CMOS transistors are fabricated on silicon wafer

Lecture 7 Fundamentals of Multiscale Fabrication

Department of Electronics

Quantum Size Effects in Nanostructures

1) Wafer Cleaning Oxidizing – Field Oxide

Chapter 1 & Chapter 3.

OMEN: a Quantum Transport Modeling Tool for Nanoelectronic Devices

Modelling & Simulation of Semiconductor Devices

Coulomb Blockade and Single Electron Transistor

Electronic devices based on nanostructures

Fabrication of Ge quantum dot circle on masked Si substrate

Multiscale Modeling and Simulation of Nanoengineering:

Nano Technology Dr. Raouf Mahmood. Nano Technology Dr. Raouf Mahmood.

1) Wafer Cleaning Oxidizing – Field Oxide (~130 nm)

Presentation transcript:

Nanodevices and nanostructures: quantum wires and quantum dots ECE 423 Final Project Wan-Ching Hung Dec 12,2006

Quantum Dots and Quantum Lines A quantum dot typically contains between 1 to 200 atoms in diameter and its length, width, and high are generally defined less than 100nm. The electron is retrained by Fermi wavelength. Quantum dot is confined in 3 dimensions and quantum line is confined in 2 dimensions.

Quantum Dots Applications Si single electron transistors Quantum Computer

Quantum Dots Applications Nanobarcodes nanobarcodes are made different quantum wires of different metals that have different reflectivity. Molecule capsule in drug delivery system

Quantum Confinement Under 100nm, the wave property of electron can not be ignored.

Tunneling Effect

Coulomb Blockade a Coulomb blockade is the increased resistance at small bias voltage of an electronic device comprising at lease one low-capacitance tunnel junction.

Bottom-Up

Self Assembly Applicatoins: solar cell, light-emitting diodes, capsule in drug delivery system

Chemical Colloidal Method

Lithography and Etching Lithography: electron beam, ion beam, nanoimprint, dip pen nanolithography Etching: wet etching, dry etching, plasma, implantation, photo etching

Split-gate Approach Use additional voltage to create 2 dimensional confinements to control the shape and size of the quantum dot ’ s gate. It ’ s a combination of e beam lithography, evaporation, lift off, contact annealing